Stacked Light-Receiving Sensor Layout for DSP Noise Isolation

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Solution Overview

Problem

Advanced image processing in image sensor chips is hindered by noise interference due to the operation of a digital signal processor (DSP) performing computations based on pre-trained models, which can deteriorate image quality, especially when the DSP's processing peaks during pixel array operations like exposure or readout.

Innovation Solution

The positional relationship between the pixel array and the DSP is adjusted to minimize noise intrusion, with layouts optimizing the stacking configuration to prevent overlap and reduce signal delay, propagation loss, and power consumption, thereby maintaining image quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the DSP is disposed on the second substrate to perform advanced image processing, then image processing capability is improved, but noise interference increases and image quality deteriorates

Engineering Contradiction:
Improveimage processing capabilityVSAvoidnoise interference
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent transitions from a planar arrangement to a three-dimensional stacked architecture, placing the pixel array on the first substrate and the DSP on the second substrate bonded vertically. This spatial separation in the stacking direction prevents noise interference while maintaining processing capability, as the DSP operates on a different substrate layer away from the sensitive pixel array.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The DSP function is extracted from the first substrate and relocated to the second substrate. This separation isolates the noise-generating processing unit from the noise-sensitive pixel array, allowing the DSP to perform computations based on pre-trained models without interfering with image capture and readout operations on the first substrate.

Inventive Principle:
Principle #2Taking out (Extraction)

2Area of stationary object

If the DSP and pixel array are disposed to overlap in the stacking direction, then device area is reduced, but signal delay and power consumption increase

Engineering Contradiction:
Improvedevice areaVSAvoidsignal delay
Core Design Contradiction:
Area of stationary objectVSLoss of time

Solution Approach 1:

The patent utilizes the stacking direction (vertical dimension) to arrange components that would otherwise be placed adjacently in the horizontal plane. By bonding the second substrate containing the DSP to the first substrate containing the pixel array, the design achieves compact footprint while the vertical separation reduces signal path length and interference compared to planar layouts.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Speed

If the DSP performs computations based on pre-trained models during pixel array operations, then processing speed is improved, but noise interference increases

Engineering Contradiction:
Improveprocessing speedVSAvoidnoise interference
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The noise-generating DSP computations are extracted and isolated on the second substrate, physically separated from the pixel array operations on the first substrate. This allows the DSP to perform high-speed computations based on pre-trained models during exposure and readout without the electromagnetic noise affecting the sensitive imaging operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The substrate bonding interface and inter-substrate connections act as intermediaries that electrically and physically separate the DSP from the pixel array. This intermediate layering structure allows high-speed processing to occur on the second substrate while preventing noise from propagating to the first substrate where imaging operations occur.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP3833007B1Layered-type light-receiving sensor and electronic device
Publication Date: 2024.03.13 SONY SEMICON SOLUTIONS CORP
  • EP3833007B1 patent drawingFigure 1
  • EP3833007B1 patent drawingFigure 2
  • EP3833007B1 patent drawingFigure 3~4

AI summary

Advanced processing is performed in a chip. A stacked light-receiving sensor according to an embodiment includes a first substrate (100, 200, 300) and a second substrate (120, 320) bonded to the first substrate. The first substrate includes a pixel array (101) in which a plurality of unit pixels are arranged in a two-dimensional matrix. The second substrate includes a converter (17) configured to convert an analog pixel signal output from the pixel array to digital image data and a processing unit (15) configured to perform a process based on a neural network calculation model for data based on the image data. At least a part of the converter is arranged on a first side in the second substrate. The processing unit is arranged on a second side opposite to the first side in the second substrate.