3D Stacked Source-Channel Structure for High-Capacity Memory

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Solution Overview

Problem

There is a demand for electronic devices with high-performance, high-capacity data storage units that retain data even when power is turned off, and existing technologies have not adequately addressed this need.

Innovation Solution

The manufacturing method involves forming a first source layer with a trench, a first sacrificial layer, and a stacked structure of alternating material layers, creating openings and channels, and forming a second source layer coupled to channel layers through the removal of the sacrificial layer, resulting in a structure with improved conductivity and data retention capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional data storage units are used, then manufacturing is simpler, but data storage capacity and performance are insufficient

Engineering Contradiction:
Improvedata storage capacityVSAvoidstacked structure complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from planar (2D) data storage to three-dimensional (3D) stacked structures, vertically stacking multiple source layers, channel layers, and block layers to increase storage capacity while maintaining a compact footprint. This dimensional change allows multiple storage cells to occupy the same lateral space at different vertical levels.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The data storage unit is segmented into distinct functional layers including source layers, channel layers, and block layers, with each layer serving specific purposes. The source layers are further divided into first and second source layers with different conductivity types, enabling sophisticated data encoding and storage operations across multiple segmented components.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If high-capacity stacked structures are implemented, then data storage capacity increases, but manufacturing difficulty increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidmanufacturing ease
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent forms the first source layer, first channel layer, and first block layer in a predetermined sequence before forming the second source layer and subsequent components. This preliminary action establishes a stable foundation and enables subsequent layers to be formed with precise alignment and controlled properties, simplifying the overall manufacturing process despite the complex final structure.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The first channel layer acts as an intermediary component between the first source layer and the first block layer, facilitating electrical connection and enabling the formation of complete storage cells. This intermediary layer allows the manufacturing process to proceed in modular stages, with each layer serving as a building block for the next.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If fast read and write speeds are achieved, then performance improves, but data retention capability may be compromised

Engineering Contradiction:
Improveread and write speedVSAvoiddata retention
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent employs parameter changes in the conductivity types of different source layers (first source layer with first conductivity type, second source layer with second conductivity type) to optimize both read/write speed and data retention. By varying electrical parameters across different layers and controlling doping concentrations, the device achieves high-speed operation while maintaining stable charge storage for data retention.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12598754B2Electronic device having stacked structures and method for manufacturing the same
Publication Date: 2026.04.07 SK HYNIX INC
  • US12598754B2 patent drawing
  • US12598754B2 patent drawing
  • US12598754B2 patent drawing

AI summary

A method for manufacturing an electronic device includes forming a first source layer including a trench, forming a first sacrificial layer in the trench, forming a first structure over the first source layer, wherein the first structure includes first material layers and second material layers which are alternately stacked over the each other, forming first openings passing through the first structure and extending to the first sacrificial layer, forming first channel layers in the first openings, forming a slit passing through the first structure and extending to the first sacrificial layer, forming a second opening by removing the first sacrificial layer through the slit, and forming a second source layer in the second opening, wherein the second source layer is coupled to the first channel layers.