3D-Stacked Source/Drain Isolation Structure for Vertical Overlap
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Solution Overview
Problem
The formation of an upper source/drain region and a lower source/drain region in 3D-stacked semiconductor devices poses challenges in isolating the two regions effectively due to vertical overlap, which complicates the manufacturing process and affects device performance.
Innovation Solution
A semiconductor device with an improved isolation structure, including a channel isolation layer, a source/drain isolation layer, and a blocking structure that prevents vertical overlap between the channel and source/drain regions, utilizing materials like silicon nitride for the blocking structure, and a method of manufacturing that involves forming these layers in specific steps to ensure effective isolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional isolation structure is used in 3D-stacked semiconductor devices, then the manufacturing process becomes complicated and device performance deteriorates, but adding a blocking structure increases manufacturing complexity
Solution Approach 1:
The isolation structure is segmented into multiple functional components: a channel isolation layer separating channel structures, a source/drain isolation layer isolating source/drain regions, and a blocking structure preventing vertical overlap. This segmentation allows each layer to perform its specific isolation function independently, achieving effective isolation without requiring a single complex monolithic structure.
Solution Approach 2:
The blocking structure extends in the vertical dimension between the channel isolation layer and source/drain isolation layer, creating a three-dimensional isolation architecture. This vertical dimensionality change enables the blocking structure to prevent vertical overlap between upper and lower source/drain regions, effectively addressing the isolation challenge in 3D-stacked devices.
2Productivity
If source/drain regions are vertically overlapped in 3D-stacked devices, then device density increases, but isolation between regions becomes difficult and short circuits may occur
Solution Approach 1:
The blocking structure serves as an intermediary element positioned between the channel isolation layer and source/drain isolation layer. This intermediary structure physically prevents vertical overlap between upper and lower source/drain regions while allowing the regions to maintain their vertically stacked configuration for high device density.
Solution Approach 2:
The blocking structure is formed in advance during the manufacturing process to preemptively prevent vertical overlap between source/drain regions. By establishing this blocking structure before final source/drain region formation, the design prevents potential short circuits before they can occur, maintaining both high density and reliability.
Data Source
AI summary
Provided is a semiconductor device whch includes: a 1st source/drain region connected to a 1st channel structure; a 2nd source/drain region, above the 1st source/drain region, connected to a 2nd channel structure above the 1st channel structure; a channel isolation layer between the 1st channel structure and the 2nd channel structure; a source/drain isolation layer between the 1st source/drain region and the 2nd source/drain region; and a blocking structure between the channel isolation layer and the source/drain isolation layer, wherein an entire width of the blocking structure in a channel-length direction is verically below a lateral edge portion of the 2nd source/drain region.