Stacked Source/Drain Structure With Sidewall Spacers for GAA Integration
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Solution Overview
Problem
Existing semiconductor devices face challenges in achieving high-performance characteristics and integration while maintaining reliability, particularly in controlling electrical signal amplification and data storage.
Innovation Solution
The semiconductor device incorporates a substrate with active patterns, channel patterns, gate electrodes, source/drain patterns, and sidewall spacers, including epitaxial layers to enhance conductivity and strain application, and a dielectric isolation layer to isolate source/drain patterns, improving device performance and integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the degree of integration of semiconductor devices is increased to meet performance requirements, then productivity and functionality improve, but manufacturing precision and reliability become more difficult to maintain
Solution Approach 1:
The source/drain structure is divided into multiple discrete patterns (first source/drain pattern, second source/drain pattern, third source/drain pattern) arranged in a stacked configuration. This segmentation allows each pattern to be precisely formed and positioned independently, maintaining manufacturing precision while achieving high integration through vertical stacking
Solution Approach 2:
The patent transitions from planar source/drain arrangement to a vertical stacked configuration along the thickness direction. By utilizing the vertical dimension, multiple source/drain patterns are integrated without increasing lateral footprint, thereby maintaining manufacturing precision while significantly improving the degree of integration
2Manufacturing precision
If sidewall spacers are used to limit the shape of source/drain patterns, then manufacturing precision improves, but device complexity increases
Solution Approach 1:
The sidewall spacers serve multiple functions: they define the shape and position of source/drain patterns, provide structural support for the stacked configuration, and enable precise alignment between different source/drain patterns. This multi-functionality reduces device complexity by consolidating multiple roles into a single structural element
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances electrical characteristics and reliability by limiting the shape of source/drain patterns, preventing defects, and applying strain to channel patterns, thereby improving the overall performance of the semiconductor device.
Implementation Method 1
at least one of the lower source/drain pattern and the upper source/drain pattern may include multiple epitaxial layers
Data Source
AI summary
A semiconductor device with improved device performance and reliability includes a substrate, an active pattern including a plurality of channel patterns disposed on substrate and vertically spaced apart from each other, a gate electrode surrounding the plurality of channel patterns, a lower source/drain pattern disposed on the substrate, and disposed on one side of the plurality channel patterns, an upper source/drain pattern spaced upward from the lower source/drain pattern, and sidewall spacers including a first sidewall spacer in contact with a first side surface of the lower source/drain pattern and defining the first side surface, and a second sidewall spacer in contact with a second side surface of the lower source/drain pattern and defining the second side surface, in which the first side surface and the second side surface are opposing side surfaces of the lower source/drain pattern.