III-V Stacked Structure With Controlled Crystallinity Layout
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor devices utilizing gallium nitride-based materials face challenges in achieving high crystallinity and precise structural control, particularly in stacked structures where the crystallinity of the second semiconductor layer is lower than that of the first semiconductor layer.
Innovation Solution
A stacked structure comprising a buffer layer, a first semiconductor layer with higher crystallinity, and a second semiconductor layer with lower crystallinity, where the second semiconductor layer surrounds the first semiconductor layer and the buffer layer is exposed vertically. This structure is fabricated using a method that includes forming a buffer layer, depositing a gallium nitride-based semiconductor layer, and etching to define the layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a stacked structure with multiple semiconductor layers is formed, then the device can utilize high band gap and breakdown electric field properties, but the crystallinity of the second semiconductor layer becomes lower than the first semiconductor layer
Solution Approach 1:
The patent divides the semiconductor structure into multiple layers with different crystallinity characteristics. The first semiconductor layer is formed with high crystallinity through specific growth conditions, while the second semiconductor layer is intentionally formed with lower crystallinity. This segmentation allows each layer to serve different functional purposes - the first layer provides high-quality crystal structure for carrier transport, while the second layer provides the necessary band gap properties for device operation.
Solution Approach 2:
The patent applies different quality standards to different regions of the semiconductor structure. The first semiconductor layer is optimized for high crystallinity to ensure excellent electrical characteristics, while the second semiconductor layer is optimized for compositional control to achieve the desired band gap. This local quality approach allows the device to simultaneously achieve high reliability and precise structural control in different regions.
2Manufacturing precision
If the second semiconductor layer surrounds the first semiconductor layer, then structural control is improved, but the fabrication process complexity increases
Solution Approach 1:
The patent transitions from planar layer stacking to a three-dimensional stacked structure where the second semiconductor layer surrounds the first semiconductor layer in a vertical configuration. This dimensional change enables precise structural control by defining the spatial relationship between layers in multiple dimensions, while the buffer layer exposure provides a reference plane for alignment and fabrication control.
Solution Approach 2:
The patent performs preliminary formation of the buffer layer and first semiconductor layer with high crystallinity before forming the second semiconductor layer. This preliminary action establishes a stable foundation and reference structure that guides subsequent fabrication steps, enabling precise structural control while managing fabrication complexity through sequential processing.
3Manufacturing precision
If the buffer layer is exposed from the second semiconductor layer, then structural control is enhanced, but the surface area increases
Solution Approach 1:
The patent creates an asymmetric structure where the buffer layer is selectively exposed from the second semiconductor layer rather than being fully covered. This asymmetric design provides several advantages: it creates a reference plane for alignment, enables selective electrical contact, and defines the lateral boundaries of the device structure. The exposed buffer layer area is controlled to provide sufficient structural reference while minimizing unnecessary surface area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enables the precise control of crystallinity and structural properties in semiconductor devices, enhancing their performance and reliability, particularly in applications requiring high band gap and breakdown electric field, such as power transistors and light-emitting elements.
Implementation Method 1
a buffer layer 106, a first semiconductor layer 108, and a second semiconductor layer 110. The buffer layer 106 and the first semiconductor layer 108 are stacked with each other in a vertical direction... Crystallinity of the first semiconductor layer 108 is higher than crystallinity of the second semiconductor layer 110
Implementation Method 2
forming, over the buffer layer, a semiconductor layer containing gallium nitride
Implementation Method 3
forming, over the buffer layer, a semiconductor layer containing gallium nitride
Implementation Method 4
etching the semiconductor layer. The semiconductor layer is etched so as to leave a first portion overlapping the buffer layer in a vertical direction and a second portion which does not overlap the buffer layer
Data Source
AI summary
Disclosed is a stacked structure which may include a buffer layer, a first semiconductor layer, and a second semiconductor layer. The buffer layer and the first semiconductor layer are stacked with each other in a vertical direction. The second semiconductor layer is in contact with a side surface of the first semiconductor layer and may surround at least a part of the first semiconductor layer in a plane perpendicular to the vertical direction. Each of the first semiconductor layer and the second semiconductor layer may include a Group III-V material or a Group III nitride material. Crystallinity of the first semiconductor layer may be higher than crystallinity of the second semiconductor layer. The buffer layer may be exposed from the second semiconductor layer in the vertical direction.