Stacked Semiconductor Substrate Copper Diffusion Barrier
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in achieving high integration density and preventing copper contamination in three-dimensional (3D) semiconductor devices, particularly in direct bonding methods where copper ions can diffuse and contaminate the substrate.
Innovation Solution
The solution involves a semiconductor device with vertically stacked substrates, where a first semiconductor substrate includes a diffusion barrier layer and a through via with a specific surface area ratio, and a second substrate with a front pad having a smaller surface area than the through via, allowing direct bonding without adhesive materials and preventing copper contamination by aligning the front pad within the through via's surface area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If direct bonding method is used to achieve high integration density, then productivity and integration density are improved, but copper contamination occurs due to ion diffusion
Solution Approach 1:
A bonding pad structure is introduced as an intermediary element between the through via and the upper substrate. This bonding pad acts as a mediator that receives copper from the through via and prevents direct diffusion into the upper substrate, thereby eliminating copper contamination while maintaining direct bonding benefits
Solution Approach 2:
The harmful copper diffusion path is extracted and isolated by introducing a separate bonding pad structure. The copper is taken out from the direct path to substrate and redirected through the bonding pad, which serves as a dedicated copper reception zone that prevents contamination
2Reliability
If larger through via surface area is used to improve bonding strength, then bonding reliability is improved, but alignment margin is reduced
Solution Approach 1:
The bonding interface is segmented into two distinct functional zones: a through via for mechanical interlocking and copper conduction, and a separate bonding pad for primary bonding contact. This segmentation allows the through via to be smaller (improving alignment) while the bonding pad provides sufficient bonding area (maintaining strength)
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the alignment margin and reduces the likelihood of copper contamination, improving the reliability and efficiency of the bonding process in 3D semiconductor devices.
Implementation Method 1
a first diffusion barrier layer covering a first surface of the first semiconductor substrate body
Implementation Method 2
stacking the second semiconductor substrate on the first semiconductor substrate to directly bond a portion of the fifth surface of the second diffusion barrier layer to a second surface of the first diffusion barrier layer and directly bond the sixth surface of the front pad to a third surface of the first through via
Data Source
AI summary
A semiconductor device includes a second semiconductor substrate vertically stacked on a first semiconductor substrate. The first semiconductor substrate includes a first diffusion barrier layer covering a first surface of a first semiconductor substrate body, and a first through via having a third surface exposed to a second surface of the first diffusion barrier layer. The second semiconductor substrate includes a second semiconductor substrate body, a second diffusion barrier layer directly bonded to a surface of the first diffusion barrier layer, and a front pad having a smaller surface area than the third surface of the first through via and directly bonded to the third surface of the first through via.