Stacked-Substrate Display Circuits for High-Resolution Headsets
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Solution Overview
Problem
Existing head-mounted display devices face challenges in providing high-resolution images due to the complexity of integrating high-resolution display devices like OLEDOS, which require efficient layout design of wires on semiconductor substrates to prevent voltage drops and parasitic capacitance.
Innovation Solution
The use of two different single crystal semiconductor substrates with divided pixel circuits and wires on each substrate, allowing for efficient current paths and preventing voltage drops by eliminating unnecessary current paths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If wires are densely integrated on a single semiconductor substrate to achieve high-resolution display, then manufacturing complexity increases and voltage drops occur, but display resolution must be maintained
Solution Approach 1:
The patent divides the pixel circuit into two separate single crystal semiconductor substrates. The first substrate contains first transistors and first scan lines, while the second substrate contains second transistors, light emitting elements, and second scan lines. This segmentation reduces wire integration complexity on each individual substrate while maintaining high display resolution through precise alignment and connection between the two substrates.
2Reliability
If long wire paths are used to connect pixel circuits on a single substrate, then voltage drops increase, but circuit connectivity must be maintained
Solution Approach 1:
The pixel circuit is segmented across two substrates with each substrate handling specific circuit functions. First transistors are on the first substrate and second transistors are on the second substrate, creating shorter and more efficient current paths within each substrate while maintaining overall circuit connectivity through controlled connections between substrates.
Solution Approach 2:
The patent introduces connection wiring layers and conductive vias as intermediaries to connect the first and second substrates. These intermediaries enable efficient current transfer between substrates while minimizing voltage drops by providing direct conductive paths rather than relying on long wire routes across a single substrate.
3Reliability
If multiple transistor types are integrated on the same substrate, then parasitic capacitance increases, but circuit functionality must be maintained
Solution Approach 1:
Different transistor types are segmented across two separate substrates. First transistors (such as drive transistors) are implemented on the first substrate, while second transistors (such as switch transistors) are implemented on the second substrate. This physical separation reduces parasitic capacitance between different transistor types while maintaining the necessary circuit functionality through inter-substrate connections.
Data Source
AI summary
A display device and a head mounted display device are provided. A display device includes a first single crystal semiconductor substrate on which a plurality of first transistors is formed, a second single crystal semiconductor substrate on the first single crystal semiconductor substrate, and on which a plurality of second transistors is formed, and a connection wiring layer between the first single crystal semiconductor substrate and the second single crystal semiconductor substrate. The second single crystal semiconductor substrate includes a display area where a plurality of light emitting elements electrically connected to the plurality of second transistors is located, and a non-display area around the display area. A plurality of first through holes located in the display area of the second single crystal semiconductor substrate and in which a first conductive via connected to each of the plurality of first transistors and the plurality of second transistors is located.