Stacked Switched Resistor Circuit for Parasitic Capacitance Limits
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Solution Overview
Problem
Prior-art switched resistors face limitations in achieving high effective resistance due to parasitic capacitance, which reduces their maximum resistance levels, especially at higher operating frequencies, and are sensitive to variations in parasitic capacitance and duty cycle timing constraints.
Innovation Solution
A stacked switched resistance device is developed, comprising multiple segments connected in series, each with a resistor and a switch, where the switches are operated simultaneously by a clock signal, reducing the impact of parasitic capacitance and allowing for relaxed duty cycle timing, thereby increasing the effective resistance and immunity to parasitic capacitance variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a large resistor is used to provide high resistance value, then the resistance value is improved, but the physical area occupied increases
Solution Approach 1:
The resistor is divided into multiple smaller resistive segments connected in series. Each segment has a smaller physical area, but their combined resistance adds up to the required high value. The switch connects these segments in series during the off-state to achieve the high effective resistance without requiring a single large physical resistor area.
2Measurement precision
If the switch operates at higher frequency to reduce pulse width errors, then the timing precision is improved, but the impact of parasitic capacitance increases
Solution Approach 1:
The resistive path is segmented into multiple sections, each with its own parasitic capacitance. By connecting these segments in series during the off-state, the total parasitic capacitance becomes the series combination of individual capacitances, which is smaller than any individual capacitance. This reduces the overall impact of parasitic capacitance on the effective resistance even at higher operating frequencies.
3Manufacturing precision
If the duty cycle is reduced to increase effective resistance, then the resistance value is improved, but the timing constraints become more stringent
Solution Approach 1:
The resistor is segmented into multiple series-connected resistive elements. During the off-state, the switch connects all segments in series, allowing the duty cycle to be defined by the ratio of on-time to total period without being constrained by the need for extremely small pulse widths. The series connection of segments provides the high resistance value even with relaxed duty cycle requirements.
4Manufacturing precision
If a single resistor with high resistance is used, then the resistance value is improved, but the sensitivity to parasitic capacitance increases
Solution Approach 1:
The high resistance is achieved by connecting multiple smaller resistive segments in series. Each segment has a smaller associated parasitic capacitance. The total parasitic capacitance of the series combination is the sum of individual capacitances divided by the square of the number of segments, which is significantly smaller than the parasitic capacitance of a single equivalent resistor. This segmentation reduces sensitivity to parasitic capacitance effects.
Data Source
AI summary
A stacked switched resistance device has been developed. The stacked switched resistance device includes a plurality of segments connected in series. Each segment includes a resistor including an inherent parasitic capacitance, and a switch connected in series with the resistor, the switch being configured to connect and disconnect the resistor from the plurality of segments in response to a predetermined clock signal. An effective resistance of the stacked switched resistance device exceeds another effective resistance of at least one resistor with an equivalent inherent resistance that is connected in series to a single switch configured to connect and disconnect the at least one resistor in response to the predetermined clock signal.