Stacked TFT Isolation Layers for Threshold Voltage Stability

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Solution Overview

Problem

The integration of thin film transistors (TFTs) in semiconductor devices is hindered by instability in threshold voltages due to hydrogen and moisture diffusion, which affects the scalability and reliability of stacked TFTs.

Innovation Solution

The implementation of a moisture-resistant isolation layer, such as metal-containing compound materials like Al2O3, Zr2O3, or TiO2, between stacked layers and an encapsulation layer to prevent hydrogen and moisture diffusion, thereby stabilizing the threshold voltages of TFTs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If thin film transistors are integrated into semiconductor devices, then integration density is improved, but threshold voltage stability deteriorates due to hydrogen and moisture diffusion

Engineering Contradiction:
Improveintegration densityVSAvoidthreshold voltage stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A moisture-resistant isolation layer is introduced as an intermediary between stacked TFT layers. This isolation layer acts as a barrier that prevents hydrogen and moisture diffusion pathways, thereby protecting the TFT threshold voltages from instability while maintaining high integration density through vertical stacking

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs composite material structures including metal-containing compound materials (such as aluminum oxide, zinc oxide, or titanium oxide) combined with dielectric layers to form a multi-layered isolation and encapsulation structure that provides both mechanical support and moisture/hydrogen barrier functionality

Inventive Principle:
Principle #40Composite materials

2Area of stationary object

If stacked TFT layers are integrated to increase device density, then area utilization is improved, but device reliability worsens due to hydrogen diffusion between layers

Engineering Contradiction:
Improvearea utilizationVSAvoiddevice reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The moisture-resistant isolation layer serves as a mediating barrier between stacked TFT layers, blocking hydrogen diffusion pathways that would otherwise propagate between layers and cause device failure, thereby enabling reliable high-density vertical integration

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

Thin film encapsulation layers and isolation barriers are deposited between stacked TFT structures to provide continuous protection against hydrogen and moisture penetration, maintaining device reliability while enabling compact vertical stacking

Inventive Principle:
Principle #30Flexible shells and thin films

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the stability and reliability of TFTs by reducing hydrogen diffusion and maintaining the integrity of the threshold voltages, improving the scalability and performance of integrated circuit devices.

Implementation Method 1

a moisture-resistant isolation layer, such as metal-containing compound materials like Al2O3, Zr2O3, or TiO2, between stacked layers and an encapsulation layer to prevent hydrogen and moisture diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS20230268355A1Integrated circuit device and method for fabricating the same
Publication Date: 2023.08.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230268355A1 patent drawing
  • US20230268355A1 patent drawing
  • US20230268355A1 patent drawing

AI summary

A method for fabricating an integrated circuit device is provided. The method includes forming a field effect transistor (FET) on a semiconductor substrate; depositing a first dielectric layer over the FET; depositing a first metal-containing dielectric layer over the first dielectric layer; and forming a first thin film transistor (TFT) over the first metal-containing dielectric layer.