Stacked LTPS and Oxide TFT Layout for Low-Variation Displays
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Solution Overview
Problem
Current thin film transistors used in display devices, whether made of low-temperature polysilicon or oxide semiconductor, face challenges such as high current variation and parasitic capacitance, which affect drive performance and lead to increased costs due to the need for correction circuits and repeated laser irradiation.
Innovation Solution
A display device design incorporating staggered thin film transistors with a low-temperature polysilicon channel layer in the peripheral region and an oxide semiconductor channel layer in the display region, where the oxide semiconductor transistor is formed above the polysilicon transistor, reducing parasitic capacitance and current variation while avoiding heat effects during polysilicon channel layer formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If low-temperature polysilicon is used for thin film transistors, then drive performance is improved, but current variation increases and requires correction circuits
Solution Approach 1:
The patent changes the material parameter of the channel layer from low-temperature polysilicon to oxide semiconductor, which fundamentally alters the electrical characteristics and reduces current variation while maintaining drive performance
Solution Approach 2:
The patent employs a composite structure combining oxide semiconductor channel layer with other functional layers, creating a hybrid transistor design that leverages the advantages of different materials to achieve both high drive performance and low current variation
2Manufacturing precision
If oxide semiconductor is used for thin film transistors, then current variation decreases, but drive performance is insufficient
Solution Approach 1:
The patent optimizes key parameters of the oxide semiconductor transistor including channel width, channel length, and threshold voltage to enhance drive performance while preserving the low current variation characteristic
Solution Approach 2:
The patent applies different material compositions and structural configurations to specific regions of the transistor (channel layer, source/drain electrodes, gate electrode) to locally optimize both current variation and drive performance
3Reliability
If repeated laser irradiation is applied to polycrystallize silicon, then drive performance improves, but manufacturing cost increases
Solution Approach 1:
The patent extracts the requirement for repeated laser irradiation by using oxide semiconductor that can be processed at lower temperatures, eliminating the need for expensive polycrystallization steps while maintaining transistor performance
Solution Approach 2:
The patent adopts a manufacturing approach using inexpensive oxide semiconductor materials and single-step processing techniques, replacing the expensive and time-consuming repeated laser irradiation process with a more economical alternative
4Manufacturing precision
If correction circuits are added to reduce current variation, then current uniformity improves, but device complexity increases
Solution Approach 1:
The patent extracts and eliminates the need for correction circuits by using oxide semiconductor transistors that inherently exhibit low current variation, achieving current uniformity through material selection rather than additional circuitry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances drive performance by minimizing parasitic capacitance and current variation, leading to improved image display capabilities with reduced device costs and material usage.
Implementation Method 1
since the first thin film transistor and the second thin film transistor are the staggered thin film transistors, parasitic capacitance becomes small, and drive performance is high
Implementation Method 2
The silicon is polycrystallized by excimer laser annealing
Implementation Method 3
The silicon is polycrystallized by excimer laser annealing
Implementation Method 4
the second thin film transistor is located above the first thin film transistor. Therefore, since the second thin film transistor is formed after the first thin film transistor, the second thin film transistor is not affected by heat at the time of forming the first channel layer configured of the low-temperature polysilicon
Data Source
AI summary
A plurality of thin film transistors provided in a peripheral region are first staggered thin film transistors where a first channel layer configured of low-temperature polysilicon is included, and the first channel layer is not interposed between a first source electrode and a first gate electrode, and between a first drain electrode and the first gate electrode. A plurality of thin film transistors provided in a display region are second staggered thin film transistors where a second channel layer configured of an oxide semiconductor is included, and the second channel layer is not interposed between a second source electrode and a second gate electrode, and between a second drain electrode and the second gate electrode. The first thin film transistor is located below the second thin film transistor.