Stacked Trace Structure for High Density Circuit Design
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Solution Overview
Problem
The challenge is to maintain high electrical performance of traces in electronic component packages while minimizing their width and pitch, which reduces the cross-sectional area and increases costs due to the need for high-grade conductive materials.
Innovation Solution
The solution involves forming stacked traces by adding a buildup trace on top of the existing trace, maintaining the same width but increasing the height, thereby enhancing the current carrying cross-sectional area without using expensive high-grade materials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the width of traces is reduced to form high density circuits, then the pitch of traces is minimized, but the cross-sectional area of traces is reduced thus reducing electrical performance
Solution Approach 1:
The patent applies dimensionality change by stacking multiple conductive layers vertically to increase the cross-sectional area of traces. Instead of increasing width in the horizontal plane, the invention adds height in the vertical dimension by forming multiple conductive layers (e.g., 104, 116, 128) stacked one on another, thereby maintaining minimal pitch while achieving sufficient current carrying capacity and electrical performance.
2Area of stationary object
If the width of traces is reduced, then the cross-sectional area of traces is reduced, but using high-grade electrically conductive material is required to maintain electrical performance
Solution Approach 1:
The patent employs composite materials by combining multiple layers of conductive materials with different properties. The structure includes a copper trace (104) in the first conductive layer, a copper buildup trace (116) in the second layer, and an aluminum trace (128) in the third layer. This composite approach allows optimization of electrical performance through material selection while controlling costs by using standard-grade materials in a multi-layer configuration rather than requiring expensive high-grade materials throughout.
3Reliability
If high-grade electrically conductive material is used to maintain electrical performance, then sufficient current can be carried with reduced cross-sectional area, but the overall cost of substrate increases
Solution Approach 1:
The patent applies segmentation by dividing the conductive path into multiple separate layers (104, 116, 128) rather than using a single thick trace. Each layer can be formed using cost-effective standard-grade materials, and the segmented structure collectively provides sufficient current carrying capacity. This segmentation allows the use of cheaper materials while maintaining electrical performance, reducing the need for expensive high-grade conductive materials.
Data Source
AI summary
Methods and systems for a trace stacking structure may comprise a stacked trace including: a first trace that comprises a first seed layer and a first metal layer in a substrate and a second trace that is stacked on the trace. The second trace may include: a second seed layer and a second metal layer, a top surface, a bottom surface opposite the top surface, and sidewalls extending between the top surface and the bottom surface and may be wholly within the width of the trace laterally. A dielectric layer may be on the substrate and enclose the sidewalls of the second trace. A trace channel may be in the dielectric layer directly above the first trace, with the second trace in the trace channel. The second trace may be identical to the first trace its sidewalls may be perpendicular to the top surface and the bottom surface.