Stacked Transistor Bias Control for Variable-Supply RF Amplifiers

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Solution Overview

Problem

Existing amplifiers face inefficiencies when operating with variable supply voltages, particularly in envelope tracking mode, as they struggle to maintain linearity and efficiency while handling RF signals with high peak-to-average ratios, leading to wasted power and heat dissipation.

Innovation Solution

A circuital arrangement featuring stacked transistors with a gate bias circuit that provides fixed and variable bias voltages to maintain constant drain voltage and equal drain-to-source voltages across transistors, allowing the amplifier to operate efficiently in saturation regions even with varying supply voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If envelope tracking mode is used with variable supply voltage to improve efficiency, then power efficiency is improved, but maintaining linearity and equal voltage distribution across stacked transistors becomes difficult

Engineering Contradiction:
Improvepower efficiencyVSAvoidvoltage distribution stability
Core Design Contradiction:
Use of energy by moving objectVSStability of the object's composition

Solution Approach 1:

The patent implements dynamic bias control circuits that adjust gate bias voltages in real-time according to the variable supply voltage level. When supply voltage changes during envelope tracking operation, the bias circuits dynamically modify the gate voltages of stacked transistors to maintain equal voltage distribution across each transistor, thereby preserving both efficiency and voltage stability simultaneously

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback mechanisms where the variable supply voltage is monitored and used to control the biasing of gate terminals. The bias control circuits receive feedback about the supply voltage level and automatically adjust the gate bias voltages to compensate for voltage variations, ensuring that each transistor in the stacked configuration maintains its proper operating point despite supply voltage fluctuations

Inventive Principle:
Principle #23Feedback

2Stability of the object's composition

If fixed bias voltage is applied to maintain constant drain voltage, then linearity is improved, but power dissipation increases under varying supply conditions

Engineering Contradiction:
Improvedrain voltage stabilityVSAvoidpower dissipation
Core Design Contradiction:
Stability of the object's compositionVSLoss of energy

Solution Approach 1:

The patent transitions from fixed bias voltage to dynamic bias control where the gate bias voltages are adjusted according to the supply voltage level. This dynamic approach allows the amplifier to maintain proper drain voltage stability only when necessary, while reducing bias voltages and power dissipation during low-power operation modes, thus resolving the contradiction between stability and energy loss

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11128261B2Constant Vds1 bias control for stacked transistor configuration
Publication Date: 2021.09.21 PSEMI CORP
  • US11128261B2 patent drawing
  • US11128261B2 patent drawing
  • US11128261B2 patent drawing

AI summary

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.