Stacked Transistor Gate Biasing for Envelope Tracking Linearity

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Solution Overview

Problem

Existing amplifiers face inefficiencies when operating with variable supply voltages, particularly in envelope tracking mode, where maintaining linearity and efficiency is challenging due to the dynamic nature of the supply voltage.

Innovation Solution

A circuital arrangement with stacked transistors and a gate bias circuit that dynamically adjusts bias voltages based on the variable supply voltage, allowing transistors to operate in either saturation or triode regions, thereby maintaining output power linearity by controlling the voltage levels and biasing across the transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If envelope tracking mode is used with variable supply voltage, then efficiency is improved, but output power linearity deteriorates

Engineering Contradiction:
ImproveefficiencyVSAvoidoutput power linearity
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

The patent implements dynamic bias voltage adjustment where the gate bias voltages of stacked transistors are continuously modified in response to variable supply voltage conditions. This allows the amplifier to adapt its operating characteristics in real-time, maintaining linearity across different efficiency modes while preserving the efficiency benefits of envelope tracking.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the bias voltage parameters of the stacked transistors based on the supply voltage level. By adjusting these electrical parameters dynamically, the system optimizes the trade-off between efficiency and linearity, allowing operation in both high-efficiency envelope tracking mode and high-linearity modes as needed.

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If bias voltages are adjusted to maintain linearity, then output power linearity is improved, but device complexity increases

Engineering Contradiction:
Improveoutput power linearityVSAvoidbias circuit complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the bias control function across multiple stacked transistors, with each transistor receiving individually adjusted bias voltages. This segmentation allows the complex linearity control task to be distributed across simpler individual transistor biasing circuits, reducing overall system complexity while maintaining performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The bias circuit is designed to serve multiple functions: it provides DC biasing for transistor operation, dynamically adjusts for linearity maintenance, and adapts to different supply voltage conditions. This multi-functionality eliminates the need for separate control circuits, reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Loss of energy

If stacked transistors are used with variable supply voltage, then efficiency is improved, but maintaining transistors in saturation region becomes difficult

Engineering Contradiction:
ImproveefficiencyVSAvoidtransistor operation stability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent dynamically adjusts the gate bias voltages of stacked transistors in response to variable supply voltage conditions. This dynamic control ensures that transistors remain in the saturation region even when supply voltage fluctuates, maintaining reliable operation while preserving efficiency improvements from envelope tracking.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The bias circuit monitors supply voltage conditions and automatically adjusts transistor bias voltages to maintain proper operating regions. This feedback mechanism ensures transistors remain in saturation for reliable operation while allowing the system to operate efficiently under varying supply conditions.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10243519B2Bias control for stacked transistor configuration
Publication Date: 2019.03.26 PSEMI CORP
  • US10243519B2 patent drawing
  • US10243519B2 patent drawing
  • US10243519B2 patent drawing

AI summary

Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage that varies according to a control voltage. The control voltage can be related to a desired output power of the amplifier and/or to an envelope signal of an input signal to the amplifier. Particular biasing for selectively controlling the stacked transistors to operate in either a saturation region or a triode region is also presented. Benefits of such controlling, including increased linear response of an output power of the amplifier, are also discussed.