Stacked Transistor Gate Biasing for Constant VDS Under Variable Supply
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Solution Overview
Problem
Existing amplifiers face inefficiencies when operating with variable supply voltages, particularly in envelope tracking mode, where maintaining linearity and efficiency is challenging due to dynamic changes in the supply voltage, leading to unwanted distortion and power dissipation.
Innovation Solution
A circuital arrangement featuring stacked transistors with a gate bias circuit that provides a fixed bias voltage to maintain a constant drain voltage for the input transistor and variable bias voltages for the output transistors, ensuring equal drain-to-source voltages across all transistors, thereby maintaining operation in the saturation region even with varying supply voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If variable supply voltage is applied to stacked transistors in envelope tracking mode, then power efficiency is improved, but distortion increases due to dynamic voltage changes
Solution Approach 1:
The bias circuit dynamically adjusts gate bias voltages in response to changing supply voltage conditions. When supply voltage decreases, the circuit automatically reduces gate bias voltages to maintain proper transistor operation and prevent distortion, while still benefiting from the lower supply voltage's power efficiency.
Solution Approach 2:
The bias circuit monitors the supply voltage and uses this information to adjust the gate bias voltages of stacked transistors. This feedback mechanism ensures that transistors remain in their saturation region despite supply voltage variations, preventing distortion while maintaining the power efficiency gains from envelope tracking.
2Reliability
If gate bias voltage is adjusted to maintain linearity with variable supply voltage, then linearity is improved, but device complexity increases
Solution Approach 1:
The bias circuit provides individual gate bias voltages to each transistor in the stacked configuration rather than a single bias voltage to all transistors. This segmentation allows precise control of each transistor's operating point, maintaining linearity while using relatively simple circuit elements like voltage dividers and buffered voltage sources.
3Loss of energy
If stacked transistor configuration is used with variable supply voltage, then power efficiency is improved, but maintaining saturation region operation becomes difficult
Solution Approach 1:
The bias circuit proactively adjusts gate bias voltages before supply voltage changes can push transistors out of saturation. By anticipating and compensating for supply voltage variations through pre-calculated bias adjustments, the circuit maintains stable saturation region operation throughout the envelope tracking cycle.
Data Source
AI summary
Various methods and circuital arrangements for biasing one or more gates of stacked transistors of an amplifier are presented, where the amplifier can have a varying supply voltage. According to one aspect, the gate of the input transistor of the amplifier is biased with a fixed voltage whereas the gates of the other transistors of the amplifier are biased with variable voltages that are linear functions of the varying supply voltage. According to another aspect, the linear functions are such that the variable voltages coincide with the fixed voltage at a value of the varying supply voltage for which the input transistor is at the edge of triode. According to another aspect, biasing of the stacked transistors is such that, while the supply voltage varies, the drain-to-source voltage of the input transistor is maintained to a fixed value whereas the drain-to-source voltages of all other transistors are equal to one another.