Stacked Transistor Bonding Isolation to Eliminate Insulation Seams

The patent removes the sacrificial layer concept entirely from the process. Instead of depositing a sacrificial layer that must be removed later, the insulation layer is formed directly in the gap between transistors using selective epitaxial growth, eliminating the source of seam formation and reliability issues associated with sacrificial layer removal and gap filling.

The insulation layer is formed preliminarily during the transistor fabrication process itself, before final device assembly. The selective epitaxial growth occurs on exposed semiconductor surfaces during the same processing sequence that forms the transistor channels, ensuring the insulation layer is present and seam-free before subsequent processing steps.

The patent applies different semiconductor materials to different locations within the stacked transistor structure. The first transistor channel can be formed from a first semiconductor material while the second transistor channel is formed from a second semiconductor material, allowing each transistor to be optimized for its specific function (e.g., NFET vs PFET) without requiring the entire stack to use uniform materials.

The selective epitaxial growth process enables parameter changes in material composition during fabrication. By controlling growth conditions and precursor selection, the process can deposit different semiconductor materials (such as SiGe for one transistor and Si for another) in sequence, allowing heterogeneous channel materials to be integrated without requiring separate fabrication processes for each material type.