Stacked Transistor Driver Circuit for Dynamic Over-Voltage Protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Transistor junctions in high-voltage circuits, particularly those using FinFET structures, are susceptible to over-voltage stress, leading to reduced device lifetime and potential system failure due to hot carrier injection and dielectric breakdown, especially in stacked device configurations where voltages exceed maximum design limits.
Innovation Solution
A dual-stacked high voltage driver circuit with feedback transistors and capacitors is implemented to dynamically control node impedance, preventing both static and dynamic over-voltage stress by generating non-stationary bias voltages and maintaining transistor junction voltages within safe limits, thereby reducing hot carrier injection and gate oxide stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If stacked devices are used to achieve high-voltage operation, then power handling capability is improved, but transistor junction voltage exceeds maximum design limits causing over-voltage stress
Solution Approach 1:
The circuit segments the high voltage node into multiple stacked transistor configurations, distributing the voltage stress across multiple junctions. Each transistor operates within its maximum voltage rating while collectively handling the high voltage, thus resolving the contradiction between power handling and reliability
Solution Approach 2:
A dedicated control circuit acts as an intermediary between the high voltage node and the stacked transistors. This control circuit dynamically adjusts the impedance of intermediate nodes to prevent over-voltage stress on individual transistor junctions, enabling high voltage operation while maintaining transistor reliability
2Strength
If high voltage is applied across stacked devices, then voltage handling capability is improved, but hot carrier injection and dielectric breakdown occur
Solution Approach 1:
The control circuit performs preliminary actions by proactively adjusting node impedances before over-voltage conditions can develop. By anticipating and preventing voltage excursions beyond maximum ratings, the circuit eliminates hot carrier injection and dielectric breakdown mechanisms before they can occur
Solution Approach 2:
The circuit employs dynamic impedance control rather than fixed biasing. The control circuit continuously adjusts the impedance of intermediate nodes in response to operating conditions, ensuring that transistor junction voltages remain within safe limits while maintaining high voltage handling capability
3Device complexity
If static bias voltages are used in stacked device circuits, then circuit simplicity is maintained, but dynamic over-voltage stress occurs during transitions
Solution Approach 1:
The control circuit implements feedback by monitoring the voltage at intermediate nodes and dynamically adjusting impedances in response to detected conditions. This feedback mechanism prevents dynamic over-voltage stress during transitions while maintaining relatively simple circuit architecture through automated control
Data Source
AI summary
An apparatus comprises a first supply node to provide a first voltage and a second supply node to provide a second voltage lower than the first voltage. First and second transistors, of a first conductivity type, are coupled in series at a first common node, wherein the first transistor is coupled to the first supply node, and the second transistor is coupled to an output node. Third and fourth transistors, of a second conductivity type, coupled in series at a second common node, wherein the fourth transistor is coupled to a third node that is to provide a third voltage, and the third transistor is coupled to the output node. First impedance circuitry is coupled to a gate terminal of the second transistor, the second supply node, and to a gate terminal of the first transistor.