Stacked Transistor Testing via Segmented Sub-Portions and Logic Decoders
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Solution Overview
Problem
Testing high power stacked transistors requires higher test voltages, which are difficult to generate and measure accurately, necessitating a design that allows transistor testing at lower voltages.
Innovation Solution
The design involves partitioning the transistor stack into sub-portions that can be individually controlled using logic decoders and level shifters, allowing for testing at lower voltage swings by turning ON or OFF specific portions of the stack, thereby reducing the effective stack height and enabling testing with lower power automated test equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the entire transistor stack is tested at once, then the device's high voltage handling capability is utilized, but the test voltage becomes difficult to generate and measure accurately
Solution Approach 1:
The transistor stack is divided into multiple sub-portions that can be independently controlled and tested. The logic decoder receives decoded signals and activates specific sub-portions based on the test requirements, allowing the stack to be tested in segments rather than as a complete high-voltage unit.
Solution Approach 2:
The test configuration is made dynamic by allowing selective activation of different sub-portions of the transistor stack. The logic decoder enables flexible control over which sub-portions are active during testing, adapting the effective stack height and voltage requirements based on specific test objectives.
2Ease of manufacture
If the transistor stack is partitioned into sub-portions for lower voltage testing, then testing becomes easier and more cost-effective, but the device complexity increases due to additional control circuitry
Solution Approach 1:
The logic decoder and level shifter circuitry serve multiple functions: they control the selective activation of sub-portions, manage voltage levels for different test conditions, and enable both individual and grouped testing of transistor sub-portions. This multi-functionality reduces the need for separate dedicated circuits for each test scenario.
Solution Approach 2:
The logic decoder acts as an intermediary between the test equipment and the transistor stack, translating test signals into appropriate activation patterns for the sub-portions. The level shifters serve as intermediaries to match voltage levels between the control circuitry and the transistor gates, simplifying the overall control architecture.
3Power
If lower voltage testing is used, then the testing equipment requirements are reduced, but the ability to test the full high voltage capability of the device is compromised
Solution Approach 1:
The testing process uses periodic activation of different sub-portions to comprehensively test the transistor stack. By systematically activating different combinations of sub-portions in sequence, the test methodology ensures that all critical high-voltage stress conditions are evaluated over time, even though individual test cycles use lower voltages.
Solution Approach 2:
The testing approach applies partial action by testing sub-portions individually and in various combinations rather than always testing the complete stack at full voltage. This allows lower-power test equipment to evaluate different aspects of device performance, with the understanding that cumulative test results validate the full high-voltage capability.
Data Source
AI summary
A stack of series coupled transistors comprising, at least two sub-portions of the stack of series coupled transistors, and at least one logic decoder coupled to the at least two sub-portions to turn ON at least one sub-portion.