Stacked Opposite-Polarity Transistors With Protected High-k Gate Integration
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Solution Overview
Problem
Challenges arise in forming stacked semiconductor structures with opposite polarity transistors due to difficulties in maintaining the integrity of work function metals and source/drain regions, particularly when integrating high-k dielectric layers and performing selective recess processes, leading to reliability issues.
Innovation Solution
The method involves recessing nanosheets in both top and bottom transistor devices while using a protective dielectric fill to separate high-k dielectric deposition from the source/drain region, enabling a self-aligned gate structure with continuous metal throughout the stack, ensuring matched work function metals and electrically isolated source/drain regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If selective recess processes are used to integrate high-k dielectric layers in stacked transistor structures, then the high-k dielectric can be deposited, but the integrity of work function metals and source/drain regions deteriorates due to process complexity
Solution Approach 1:
A protective dielectric fill is deposited beforehand to cover the source/drain regions before high-k dielectric deposition. This preliminary protective action prevents damage to source/drain regions and work function metals during subsequent processing, eliminating the need for complex selective recess processes while maintaining structural integrity.
Solution Approach 2:
The protective dielectric fill acts as an intermediary layer between the source/drain regions and the high-k dielectric deposition process. This intermediary protects the sensitive source/drain regions and work function metals from direct exposure to the deposition process, preventing integrity deterioration without requiring complex selective recess steps.
2Area of stationary object
If stacked transistor structures with opposite polarity transistors are integrated, then device area footprint is reduced, but maintaining work function metal integrity becomes more difficult
Solution Approach 1:
The protective dielectric fill is deposited in advance to shield work function metals in both n-type and p-type transistors before high-k dielectric deposition. This preliminary protection enables the integration of opposite polarity transistors in a stacked configuration while maintaining work function metal integrity, achieving area reduction without sacrificing reliability.
3Manufacturing precision
If complex selective recess processes are performed, then high-k dielectric layers can be integrated, but manufacturing precision deteriorates due to process difficulty
Solution Approach 1:
The protective dielectric fill is deposited beforehand to cover source/drain regions, transforming the difficult selective recess process into a simpler, more precise high-k dielectric deposition process. This preliminary action improves manufacturing precision by eliminating the variability and difficulty associated with selective recess operations.
Solution Approach 2:
The protective dielectric fill serves as an intermediary that simplifies the manufacturing process. Instead of performing complex selective recess operations to protect source/drain regions, the intermediary protective layer enables direct high-k dielectric deposition with improved precision and easier manufacturing.
Data Source
AI summary
A semiconductor device includes at least one stacked device structure including at least one upper transistor device including one or more upper channel layers, and at least one lower transistor device including one or more lower channel layers, and at least two high-k free dielectric layers. The semiconductor device also includes a common gate structure including a metal fill portion, where a first side of the metal fill portion contacts a first one of the at least two high-k free dielectric layers, and a second side of the metal fill portion contacts a second one of the at least two high-k free dielectric layers.