Stacked Pixel and Gate-Driver Transistors for Narrow-Bezel Displays
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Solution Overview
Problem
Existing display devices face challenges in achieving a narrow bezel, increased design flexibility, higher resolution, and preventing circuit complexity due to the mixed provision of pixel circuits with and without gate drivers, leading to complex wiring connections.
Innovation Solution
A layered structure is implemented where transistors constituting pixel circuits are stacked in an upper layer, and transistors forming a gate driver are placed in a lower layer, allowing for a narrower bezel and simplified circuit design by repeating the same circuit layout in the upper layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If gate drivers are dispersedly provided in pixel regions to narrow bezel, then design flexibility is improved, but pixel area increases and resolution is hindered
Solution Approach 1:
The patent applies dimensionality change by moving gate driver transistors from the same plane (2D layout) to a different layer (3D stacking). Specifically, pixel circuit transistors are formed in a first layer and gate driver transistors are formed in a second layer above it, allowing vertical integration. This resolves the contradiction by enabling gate drivers to be provided in pixel regions without increasing the horizontal pixel area, thus maintaining high resolution while achieving design flexibility and narrow bezel.
2Adaptability or versatility
If pixel circuits with and without gate drivers are provided in a mixed manner, then design flexibility is improved, but circuit design becomes more complex
Solution Approach 1:
The patent applies segmentation by dividing the circuit into distinct functional layers: pixel circuits in the first layer and gate drivers in the second layer. This segmentation allows each layer to be designed and optimized independently, with standardized connection interfaces between layers. The segmentation resolves the contradiction by enabling design flexibility through modular architecture while preventing circuit design complexity through clear layer separation and standardized inter-layer connections.
3Length of stationary object
If gate drivers are provided in pixel regions, then bezel is narrowed, but wiring connections become more complex
Solution Approach 1:
The patent uses dimensionality change to resolve wiring complexity by transitioning from planar wiring to vertical inter-layer connections. Gate driver transistors in the second layer can be directly connected to pixel circuits in the first layer through vertical conductors, eliminating the need for complex lateral wiring routes. This vertical integration narrows the bezel while simplifying wiring connections compared to traditional same-plane layouts.
Data Source
AI summary
A display device that can be easily and more flexibly designed is provided. The display device includes a pixel circuit and a driver circuit in a display portion. The driver circuit includes a plurality of pulse output circuits. Each of the plurality of pulse output circuits has a function of driving a gate line. The pixel circuit is electrically connected to the gate line. Each of the plurality of pulse output circuits includes a first transistor. The pixel circuit includes a second transistor. A layer including the second transistor is over a layer including the first transistor, and the first transistor and the second transistor overlap with each other.