Stacked 1.8V Transistors for 3.3V USB Overvoltage Protection
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Solution Overview
Problem
The integration of USB 2.0 and USB 3.0 onto a single chip is challenging due to the difficulty in supporting 3.3V devices as CMOS technologies advance, with 32 nm and smaller technologies facing increased complexity and cost, and 1.8V devices being unsuitable for 3.3V circuits.
Innovation Solution
A circuit design using 1.8V transistors connected in series with a control circuit that applies bias voltages to turn on or off the transistors based on voltage ranges, effectively clamping the pad voltage during overvoltage or undervoltage conditions, utilizing stacked 1.8V NFETs and PFETs as pull-up and pull-down circuits to protect 3.3V USB 2.0 transceivers from input signal overshoot and undershoot.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If 3.3V signaling is used for USB 2.0, then USB 2.0 compatibility is achieved, but supporting 3.3V devices becomes difficult and adds process steps and cost in 32 nm and smaller CMOS technologies
Solution Approach 1:
The protection circuit segments the voltage handling function by using multiple 1.8V transistors connected in series, where each transistor handles a portion of the total voltage. This allows the circuit to manage 3.3V signals without requiring 3.3V-rated transistors, thus maintaining USB 2.0 compatibility while avoiding the need for additional 3.3V device support processes.
2Speed
If 1.8V thick oxide devices are used, then logic performance is optimized, but the devices cannot handle 3.3V circuits used in USB 2.0
Solution Approach 1:
The circuit segments the voltage stress across multiple 1.8V transistors connected in series. Each transistor experiences only a fraction of the total 3.3V (approximately 1.65V when two transistors are in series), which is within the safe operating range of 1.8V devices. This segmentation allows 1.8V transistors to reliably handle USB 2.0 signaling without exceeding their voltage ratings.
Solution Approach 2:
The control circuit dynamically adjusts the operating parameters of the transistors by applying bias voltages that modify their threshold voltages and on-resistances. This allows the transistors to operate optimally within their 1.8V rating while the series combination handles the higher 3.3V USB 2.0 signaling voltages, thus optimizing logic performance without compromising reliability.
3Reliability
If multiple transistors are connected in series to handle voltage, then voltage protection is achieved, but control complexity increases
Solution Approach 1:
The protection circuit employs self-service mechanisms where the transistors automatically turn on or off based on the voltage conditions at their gates. The control circuit uses simple bias voltage generation that automatically adjusts transistor states without requiring complex external control logic, thereby achieving voltage protection with minimal control complexity.
Data Source
AI summary
Universal Serial Bus (USB) protection circuits are provided. A circuit includes a plurality of first transistors connected in series between a pad and ground. The circuit also includes a plurality of second transistors connected in series between the pad and a supply voltage. The circuit further includes a control circuit that applies respective bias voltages to each one of the plurality of first transistors and to each one of the plurality of second transistors. The bias voltages are configured to: turn off the plurality of first transistors and turn off the plurality of second transistors when a pad voltage of the pad is within a nominal voltage range; sequentially turn on the plurality of first transistors when the pad voltage increases above the nominal voltage range; and sequentially turn on the plurality of second transistors when the pad voltage decreases below the nominal voltage range.