Stacked Variable Resistance Memory With Selective Transistor Diode Layers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices face limitations in data storage capacity and reliability due to the use of transistors for memory selection elements, which are difficult to integrate densely, and diodes, which are prone to data disturbance and leakage when used for high-capacity storage.
Innovation Solution
A semiconductor device with a first memory layer using variable resistance elements and selection transistors for reliable data storage, and a second memory layer using variable resistance elements and selection diodes for high-capacity storage, allowing for efficient data storage by selectively utilizing these layers based on data characteristics, with the second memory layers stacked over the first to achieve miniaturization and cost reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If transistors are used for memory selection elements, then reliability and data-holding performance are improved, but area consumption increases and integration density decreases
Solution Approach 1:
The memory device is divided into two distinct memory layers: a first memory layer using transistors for high-reliability data storage, and a second memory layer using diodes for high-capacity storage. This segmentation allows each layer to optimize for its specific function, resolving the contradiction between reliability and area efficiency.
Solution Approach 2:
Different selection elements are used in different regions of the memory device: transistors are deployed where high reliability is needed (first memory layer), while diodes are used where area efficiency is prioritized (second memory layer). This local differentiation resolves the area-reliability contradiction by matching component characteristics to functional requirements.
2Area of stationary object
If diodes are used for memory selection elements, then area consumption decreases and integration density increases, but reliability and data-holding performance deteriorate
Solution Approach 1:
The memory device separates functionality into two layers: diodes are used exclusively in the second memory layer for high-capacity storage where area efficiency is critical, while transistors handle the first memory layer for reliable data storage. This segmentation allows diodes to achieve their area advantage without compromising overall system reliability.
Solution Approach 2:
Diodes are strategically deployed only in regions where area efficiency is the primary concern (second memory layer), while transistors are used where reliability is paramount (first memory layer). This localized application resolves the contradiction by ensuring diodes operate in their optimal performance context.
3Quantity of substance
If a single memory layer structure is used, then device complexity is reduced, but storage capacity is limited
Solution Approach 1:
The invention transitions from a two-dimensional planar memory structure to a three-dimensional stacked structure with multiple memory layers. By stacking the first and second memory layers vertically, the device achieves increased storage capacity without proportionally increasing footprint area, effectively resolving the capacity-complexity contradiction through dimensional expansion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables increased storage capacity and improved operation stability while allowing for miniaturization and cost reduction by using transistors for reliable data and diodes for high-capacity storage, addressing the limitations of conventional devices.
Implementation Method 1
a first variable resistance element that stores data by varying a resistance value
Implementation Method 2
a second variable resistance element that stores data by varying a resistance value
Data Source
AI summary
A semiconductor device including: a first memory cell including a non-volatile first variable resistance element that stores data by varying a resistance value and a selection transistor that selects the first variable resistance element; a first memory layer provided with more than one such first memory cell arranged in a plane; a second memory cell including a non-volatile second variable resistance element that stores data by varying a resistance value and a selection diode that selects the second variable resistance element; and a second memory layer provided with more than one such second memory cell arranged in a plane; wherein more than one such second memory layer is stacked over the first memory layer.