Stacked Wafer Edge Structure for Better Coating Adhesion

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Solution Overview

Problem

The challenge in semiconductor manufacturing lies in forming reliable devices at smaller sizes due to the complexity of processing and manufacturing ICs, where coating materials adhere poorly to steep wafer edges, leading to defects and contamination.

Innovation Solution

A multi-trimming process is applied to the underlying wafer to create a stepped sidewall structure, improving adhesion of coating materials and minimizing contamination, thereby enhancing production efficiency and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a steep wafer edge structure is used, then the wafer can be processed with standard equipment, but coating materials adhere poorly leading to defects and contamination

Engineering Contradiction:
Improvewafer processing compatibilityVSAvoidcoating material adhesion
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The wafer edge is segmented into multiple levels through the multi-trimming process, creating a stepped structure with first, second, and third levels. This segmentation transforms the single steep edge into multiple gentler slopes, allowing coating materials to adhere properly at each level while maintaining the overall edge structure needed for standard equipment processing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention applies local quality modification by creating different geometric configurations at different portions of the wafer edge. The stepped structure provides varying surface angles and areas at different levels, with each level optimized for specific functions: the first level maintains equipment compatibility, while the second and third levels provide enhanced coating adhesion surfaces.

Inventive Principle:
Principle #3Local quality

2Productivity

If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs decrease, but processing complexity and manufacturing difficulty increase

Engineering Contradiction:
Improveproduction efficiencyVSAvoidprocessing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The multi-trimming process is performed as a preliminary action before coating operations. By pre-forming the stepped wafer edge structure with controlled levels and surfaces, the subsequent coating process can proceed smoothly without the complexity of dealing with steep edges, thereby maintaining high production efficiency while reducing processing difficulties.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12494359B2Stacked wafer structure and method for forming the same
Publication Date: 2025.12.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12494359B2 patent drawing
  • US12494359B2 patent drawing
  • US12494359B2 patent drawing

AI summary

A method includes bonding a front side surface of a first wafer to a front side of a second wafer; forming a bonding material on a periphery of the first wafer and a periphery of the second wafer; performing a thinning process on the first wafer from a back side surface of the first wafer; after performing the thinning process, performing a trimming process from the back side surface of the first wafer to remove a first portion of the bonding material and partially trim down the periphery of the second wafer from a front side surface of the second wafer.