Stacked Wafer Dicing with Oxide-Filled Trenches for Clean Edges
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional die dicing methods like cutter wheel dicing cause edge chipping and internal stresses, while laser and plasma dicing face material selectivity issues, especially for low dielectric-constant layers and metals, and existing combined dicing methods struggle with slag accumulation when dicing multi-layer stacked wafers.
Innovation Solution
A method involving a wafer bonding structure with stacked wafers, a first oxide layer, a trench formed through the wafers, a second oxide layer filling the trench, planarization, and a hybrid bonding interface, followed by removal of the second oxide layer and dicing the substrate, using techniques like laser, plasma, and chemical mechanical polishing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional cutter wheel dicing is used, then the dicing process is simple and fast, but edge chipping and internal stresses occur
Solution Approach 1:
The patent replaces the mechanical cutter wheel dicing system with a laser-based dicing system. The laser beam cuts through the wafer without physical contact, eliminating mechanical stress and edge chipping while maintaining high processing speed. This substitution of mechanical energy with optical energy resolves the contradiction between productivity and edge quality.
2Manufacturing precision
If laser surface dicing is used, then edge chipping is reduced, but heat affected zone and re-melting problems occur
Solution Approach 1:
The patent optimizes laser dicing parameters including pulse duration, power density, and scanning speed to minimize heat accumulation. By using ultrashort pulse lasers and controlling the laser parameters within specific ranges, the heat affected zone is reduced while maintaining clean cuts without re-melting.
3Reliability
If laser stealth dicing or plasma dicing is used, then material selectivity is improved, but dicing of low-k layers and metals becomes difficult
Solution Approach 1:
The patent employs a multi-mode laser system that can switch between different dicing mechanisms (stealth dicing, surface dicing, grooving) and combines it with plasma etching capability. This universal system can handle various materials including low-k layers and metals by selecting the appropriate dicing mode, thus achieving both material selectivity and broad adaptability.
4Reliability
If combined dicing manner of laser grooving and plasma etching is used, then material selectivity is improved, but slag accumulation occurs in multi-layer stacked wafers
Solution Approach 1:
The patent performs preliminary laser grooving to create a controlled pathway through the multi-layer structure before plasma etching. This preliminary action defines the etch path and prevents uncontrolled slag accumulation by ensuring that the plasma etching proceeds along a pre-established channel, thus maintaining material selectivity while minimizing slag problems.
Solution Approach 2:
The patent introduces an intermediary oxidation step between laser grooving and plasma etching. This oxidation layer acts as a mediator that facilitates cleaner material removal and reduces slag accumulation by chemically preparing the surface for subsequent plasma etching, thus resolving the contradiction between selectivity and slag control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively addresses slag accumulation and ensures a planarized surface for hybrid bonding, enabling precise dicing of multi-layer stacked wafers without significant edge chipping or internal stresses.
Implementation Method 1
Dicing is performed along a dicing lane test structure of the topmost wafer, to form a first trench in the wafer bonding structure
Implementation Method 2
the first oxide layer and the second oxide layer may be formed by using a chemical vapor deposition (CVD) process
Implementation Method 3
the surface of the second oxide layer may be planarized by using a chemical mechanical polishing (CMP) manner
Implementation Method 4
the substrate of the bottommost wafer may be diced by using a plasma dicing process
Data Source
AI summary
A wafer cutting method, including providing a wafer bonding structure; forming a first oxide layer on a dielectric layer of a topmost wafer of the wafer bonding structure; performing cutting along a scribe lane test structure of the topmost wafer so as to form a first trench in the wafer bonding structure, the first trench penetrating through at least one wafer and exposing a substrate of a bottommost wafer; and filling the first trench with a second oxide layer.