Stacked Wafer Sidewall Structure for Coating Adhesion
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in forming reliable devices at smaller sizes due to increased complexity and poor adhesion of coating materials on steep wafer edges, leading to defects and contamination during processing.
Innovation Solution
A multi-trimming process is applied to the underlying wafer to create a stepped sidewall structure, improving the adhesion of subsequent coating materials and reducing pollution on the first wafer, thereby enhancing production efficiency and lowering costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If feature sizes continue to decrease to increase functional density, then production efficiency increases and costs lower, but processing complexity increases and manufacturing reliability deteriorates
Solution Approach 1:
The patent applies segmentation by dividing the wafer into multiple stacked layers (first wafer, second wafer, third wafer) with different functional regions. Each layer can be processed independently or simultaneously, allowing complex manufacturing to be broken down into manageable segments that maintain reliability while increasing overall productivity through parallel processing capabilities
2Shape
If coating materials are applied to steep wafer edges, then edge coverage is achieved, but adhesion deteriorates causing material loss and contamination
Solution Approach 1:
The patent implements local quality by creating distinct regions on the wafer surface with different geometries. The first wafer has a first region with a first sidewall angle and a second region with a second sidewall angle, allowing coating materials to adhere properly on gentler slopes while still achieving edge coverage. This localized geometric modification ensures that each region has the optimal shape for its specific function, resolving the adhesion problem on steep edges
3Reliability
If multi-trimming process is applied to create stepped sidewall structure, then coating material adhesion improves and contamination reduces, but processing complexity increases
Solution Approach 1:
The patent applies preliminary action by performing trimming operations on the wafers before coating material deposition. The first wafer is trimmed to create the first stepped sidewall structure, and the second wafer is trimmed to create the second stepped sidewall structure in advance. This preliminary geometric preparation ensures that when coating materials are later applied, they automatically achieve proper adhesion without requiring complex real-time process adjustments, thus improving reliability while managing processing complexity
Data Source
AI summary
A method includes bonding a front side surface of a first wafer to a second wafer; performing a multi-trimming process on the first and second wafers from a back side surface of the first wafer, the multi-trimming process comprising: performing a first trimming step from the back side surface of the first wafer to cut through a periphery of the first wafer; performing a second trimming step on the second wafer to partially cut a periphery of the second wafer to form a first step-like structure; and performing a third trimming step on the second wafer to partially cut the periphery of the second wafer to form a second step-like structure connecting down from the first step-like structure; after performing the multi-trimming process, forming a coating material at least over the periphery of the second wafer.