Stacked Wiring Structure with Intermediate Layer for Warpage Control
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Solution Overview
Problem
The increasing number of input/output (I/O) connections in semiconductor chips leads to larger and thicker semiconductor substrates, resulting in decreased yield and warpage issues, which are not effectively addressed by existing manufacturing methods.
Innovation Solution
A wiring structure comprising an upper conductive structure, a lower conductive structure, and metallic structures electrically connected through an intermediate layer, with a manufacturing method that involves forming dielectric and circuit layers and metallic portions to create a stacked structure that balances yield and cost, while minimizing substrate thickness and warpage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of I/O connections is increased, then the electrical performance and functions are improved, but the substrate thickness and warpage increase
Solution Approach 1:
The substrate is divided into an upper substrate and a lower substrate that are bonded together through intermediate layers. This segmentation allows the I/O connections to be distributed across multiple layers and regions, increasing the total number of connections without proportionally increasing the thickness of each individual substrate layer.
Solution Approach 2:
The patent transitions from a planar arrangement of I/O connections to a three-dimensional stacked structure with upper and lower substrates. This dimensional change enables I/O connections to be arranged in multiple levels, significantly increasing connection density without linearly increasing substrate thickness.
2Adaptability or versatility
If the number of I/O connections is increased, then the electrical performance and functions are improved, but the warpage increases
Solution Approach 1:
The intermediate layers act as counterbalancing elements between the upper and lower substrates. By strategically positioning and designing these intermediate layers, the patent compensates for warpage forces generated by the increased I/O connections, maintaining overall substrate stability and flatness.
Solution Approach 2:
The patent employs composite structures combining upper substrate, intermediate layers, and lower substrate. This composite design allows different materials with complementary properties to work together, where the intermediate layers provide mechanical support and warpage compensation while the substrates provide structural integrity and electrical connectivity.
3Adaptability or versatility
If the substrate size is increased to accommodate more I/O connections, then the functionality is improved, but the manufacturing yield decreases
Solution Approach 1:
By dividing the substrate into separate upper and lower portions, the patent enables independent manufacturing and testing of each segment. This segmentation allows for higher manufacturing yield as defects can be isolated to specific segments, and good segments can be selectively bonded together, avoiding the need to discard entire large substrates.
Data Source
AI summary
A wiring structure includes an upper conductive structure, a lower conductive structure, a plurality of metallic structures and an intermediate layer. The upper conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The lower conductive structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The metallic structures are disposed between the upper conductive structure and the lower conductive structure, and electrically connecting the upper conductive structure and the lower conductive structure. The intermediate layer is disposed between the upper conductive structure and the lower conductive structure, and covers the metallic structures.


