Staggered Clock Supply for Low-Peak Current Circuit Reset
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Solution Overview
Problem
Existing clock supply technologies face challenges in reducing peak current consumption during resetting operations of logical circuits, leading to higher power consumption and manufacturing costs due to incomplete resetting and overlapping clock periods among circuit blocks.
Innovation Solution
A clock supply apparatus that supplies clock signals with different rising timings to each circuit block, preventing overlapping of resetting periods and ensuring complete resetting while reducing peak current consumption by using a control signal generation unit and clock gating cells to manage clock signals during both normal and resetting operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If independent clocks are supplied to multiple circuit blocks during resetting operation, then resetting completeness is improved, but peak current consumption increases due to overlapping resetting periods
Solution Approach 1:
The patent implements periodic action by sequentially supplying clock signals to different circuit blocks during resetting operations. The clock supply apparatus divides the resetting period into multiple phases, where each circuit block receives clock signals in a staggered manner rather than simultaneously. This sequential periodic supply prevents overlapping resetting periods, thereby reducing peak current consumption while ensuring that all circuit blocks are completely reset through multiple clock cycles.
2Use of energy by stationary object
If clock frequency is lowered during resetting operation, then total power consumption is reduced, but instantaneous current consumption per clock cycle remains high
Solution Approach 1:
The patent applies segmentation by dividing the circuit blocks into multiple groups and supplying clock signals to each group in separate phases during resetting. Instead of lowering the clock frequency for all blocks simultaneously (which would still cause high instantaneous current when all blocks reset at once), the system segments the resetting process so that fewer flip-flops are active per clock cycle, thereby reducing instantaneous current consumption while maintaining appropriate total power consumption levels.
Data Source
AI summary
A clock supply apparatus for supplying clock signals to a plurality of circuit blocks includes a supply unit configured to supply, to reset the plurality of circuit blocks, a clock signal rising at timing different from one circuit block to another to each of the plurality of circuit blocks.