Staggered Self-Aligned Contacts for FinFET Gate Pitch Scaling
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Solution Overview
Problem
In advanced integrated circuit technologies, the shrinking gate pitch and fin-type active regions in FinFETs lead to contact-to-gate bridging and high contact resistance issues, along with manufacturing challenges such as patterning and cost concerns, due to the need for precise alignment and scaling of contact/via structures.
Innovation Solution
A method for forming a staggered self-aligned contact/via structure using a dual dielectric material approach, where two different dielectric materials are selectively deposited and interdigitated to achieve self-alignment, reducing the complexity and cost of the manufacturing process while maintaining precise alignment and preventing bridging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional contact/via formation methods are used with shrinking gate pitch, then contact/via sizes are reduced for high-density requirement, but bridging and alignment issues occur
Solution Approach 1:
The patent applies preliminary action by forming mandrels and spacers before the actual contact/via patterning step. The mandrels are positioned at desired contact locations, and spacers are formed around them to define precise contact openings. This preliminary structure formation enables accurate alignment without requiring high-precision direct patterning of the contact holes themselves, thus resolving the alignment precision issue while maintaining high-density gate pitch
Solution Approach 2:
The patent introduces mandrels and spacers as intermediary structures to mediate between the gate pattern and the contact/via pattern. These intermediaries serve as alignment references and physical guides during subsequent etching steps, ensuring that contact openings are precisely positioned relative to gates and fins even when gate pitch is shrunk, thereby preventing bridging and alignment errors
2Productivity
If contact/via sizes are continuously shrunk for high-density gate pitch, then productivity increases, but contact resistance increases and reliability degrades
Solution Approach 1:
The patent applies local quality by creating staggered contact structures where different regions have different characteristics. Specifically, contacts are formed at different heights relative to the gate - some contacts reach the source/drain region while others are positioned differently. This staggered configuration allows optimization of contact resistance in critical regions while maintaining high density overall, as each contact can be independently optimized for its specific location and function
Solution Approach 2:
The patent introduces vertical dimensionality variation through staggered contact heights. Instead of all contacts being at the same vertical level, the structure utilizes different contact depths and heights to achieve functional differentiation. This vertical staggering allows contacts to be optimally positioned in the Z-dimension to reduce resistance while maintaining high horizontal density, effectively adding a dimensional degree of freedom to resolve the reliability-productivity tradeoff
3Manufacturing precision
If precise alignment is required for contact to gate, then manufacturing complexity increases, but if alignment is relaxed, then bridging occurs
Solution Approach 1:
The patent applies self-service through self-aligned spacer formation where the spacer structure automatically positions itself relative to the mandrel and gate. The spacer width and position are determined by conformal deposition around the mandrel, creating inherent self-alignment without requiring additional alignment steps or complex lithography. This self-aligning mechanism achieves precise contact-to-gate alignment while keeping the manufacturing process relatively simple, as the structure guides its own formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively addresses the alignment and bridging issues, enabling the formation of smaller dimension contact/via structures with improved reliability and reduced manufacturing complexity and cost, enhancing the performance and reliability of integrated circuits.
Implementation Method 1
selectively depositing a first dielectric material on the first contact, wherein the selectively depositing of the first dielectric material includes laterally extends the first dielectric material to the dielectric spacer
Implementation Method 2
selectively depositing a second dielectric material on the second contact, wherein the selectively depositing of the second dielectric material includes laterally extends the second dielectric material to a lateral extended portion of the first dielectric material over the dielectric spacer
Data Source
AI summary
The present disclosure provides one embodiment of a semiconductor structure. The semiconductor structure includes a semiconductor substrate; a first conductive feature and a second conductive feature disposed on the semiconductor substrate; and a staggered dielectric feature interposed between the first and second conductive feature. The staggered dielectric feature includes first dielectric layers and second dielectric layers being interdigitated. The first dielectric layers include a first dielectric material and the second dielectric layers include a second dielectric material being different from the first dielectric material.