Nonvolatile Memory Device Staggered Electrode Phase Change
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Solution Overview
Problem
Current phase change memory devices face challenges in achieving high integration and low power consumption due to large contact areas between electrodes and phase change materials, leading to high heat release and inefficient phase change operations.
Innovation Solution
A nonvolatile memory device design featuring select active elements with impurity diffusion regions and variable resistance layers, where the electrodes are arranged non-parallel to the diffusion regions, allowing for a staggered or zigzag configuration of the phase change layer-electrode arrays, reducing the phase change region and minimizing heat release while enabling high integration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the contact area between electrodes and phase change material is reduced to lower heat release and power consumption, then power consumption and heat release are reduced, but integration density and manufacturing precision become more difficult to achieve
Solution Approach 1:
The patent transitions from planar electrode arrangements to a three-dimensional staggered configuration where electrode arrays are offset in the vertical dimension. This dimensional change allows reduced contact area between electrodes and phase change material while maintaining manufacturing feasibility through standard semiconductor fabrication processes, thereby reducing power consumption without sacrificing integration density
Solution Approach 2:
The patent implements a nested structure where variable resistance layers are positioned within regions defined by staggered electrode arrays. The first and second variable resistance layers are nested between different electrode arrays, allowing multiple memory elements to be stacked vertically. This nesting approach reduces the lateral contact area while achieving high integration density through vertical stacking
2Productivity
If the phase change region is reduced to enable faster rewriting operations, then rewriting speed is improved, but the amount of heat required for phase change becomes more concentrated and difficult to control
Solution Approach 1:
The patent divides the heating function across multiple segmented electrode arrays (first electrode array and second electrode array) that are staggered relative to each other. This segmentation distributes the heat generation across multiple smaller electrode-phase change material contact regions, preventing excessive heat concentration while enabling rapid sequential rewriting operations through controlled pulse application to different segments
Solution Approach 2:
The patent employs periodic pulsed electrical signals applied to the staggered electrode arrays to induce phase changes. By applying pulses periodically to different electrode segments in a time-multiplexed manner, the system achieves high rewriting speed through rapid sequential operations while controlling temperature by allowing heat dissipation between pulses and distributing thermal load across multiple periodic cycles
3Loss of energy
If electrodes are arranged non-parallel to impurity diffusion regions to reduce heat release, then heat release and power consumption are reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent introduces asymmetric staggering between electrode arrays and impurity diffusion regions, where the electrode arrays are deliberately offset at specific distances from the diffusion regions rather than being symmetrically aligned. This asymmetric arrangement reduces the contact area and heat release while maintaining manufacturability by using fixed offset distances that can be incorporated into standard fabrication design rules, avoiding excessive device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enables efficient phase change operations with reduced power consumption and high integration, allowing for faster and more efficient data rewriting with lower current amounts, while maintaining the ability to achieve high integration densities.
Implementation Method 1
Storage and erasure of data in the phase change memory device are performed by using thermal energy to cause a transition between two or more solid phases, such as a (poly) crystal state and an amorphous state in a phase change material
Implementation Method 2
an electrical pulse (voltage or current pulse) is applied between the electrodes to heat the phase change material itself by Joule heating
Data Source
AI summary
A nonvolatile memory device (21) is provided with a semiconductor substrate, a plurality of active regions (3) formed on the semiconductor substrate and extending in a band, a plurality of select active elements (23) formed in the active regions (3) and having a first impurity diffusion region and a second impurity diffusion region, a plurality of first electrodes (13) electrically connected to the first impurity diffusion region, a variable resistance layer (12) electrically connected to the first electrodes (13), and a plurality of second electrodes electrically connected to the variable resistance layer (12). Among the plurality of first electrodes (13) and the plurality of second electrodes, an array direction of at least one pair of the first electrodes (13) and the second electrodes that are electrically connected to the same variable resistance layer (12), and a direction of extension of the activation regions (3) are not parallel.