Staggered Lattice Dummy Patterns for Underfill Flow Control
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Solution Overview
Problem
In semiconductor chip mounting substrates, the infiltration of underfill resin is often hindered by narrow gaps between the chip and substrate, leading to void formation and reduced insulation and mounting reliability.
Innovation Solution
A mounting substrate with a lattice or staggered lattice arrangement of dummy patterns made of solder resist material is used to control the flow of underfill, ensuring uniform infiltration and reducing void formation by positioning these patterns near the second connection pads and optimizing their shape and spacing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If connection pads are arranged in narrow gaps to achieve compact layout, then area is reduced, but underfill infiltration is hindered and void formation increases
Solution Approach 1:
The connection pad structure is segmented into multiple layers: a first connection pad layer at the bottom and a second connection pad layer above it, separated by an insulating layer. This segmentation allows underfill to infiltrate through the insulating layer between the layers, preventing void formation while maintaining compact area.
Solution Approach 2:
The connection pads are arranged in a vertical stacked configuration rather than a planar side-by-side arrangement. This three-dimensional stacking enables underfill infiltration from the side through the insulating layer, solving the void formation problem while reducing the horizontal area occupied by connection pads.
2Area of stationary object
If connection pads are placed close together to reduce substrate size, then area is reduced, but insulation between adjacent connection parts deteriorates
Solution Approach 1:
The insulating layer is segmented into multiple portions that selectively cover different regions. The first insulating layer covers the first connection pad, while the second insulating layer covers the second connection pad, providing targeted insulation between closely spaced connection parts in different vertical layers.
Solution Approach 2:
Insulation is achieved by utilizing the vertical dimension with stacked insulating layers between connection pads, rather than relying solely on horizontal spacing. This allows adequate insulation even when connection pads are closely spaced in the planar view.
3Area of stationary object
If underfill is infiltrated through narrow gaps to achieve compact design, then area is reduced, but infiltration difficulty increases and voids form
Solution Approach 1:
The insulating layer is segmented to create controlled infiltration paths. By positioning the insulating layer between the first and second connection pads, the structure provides defined channels for underfill to flow through, making infiltration easier despite the compact narrow gap design.
Solution Approach 2:
The insulating layer acts as an intermediary structure that facilitates underfill infiltration. Its positioned between the connection pad layers, it provides a controlled pathway that guides underfill flow and prevents void formation in the narrow gaps of the compact design.
Data Source
AI summary
A mounting substrate for mounting a semiconductor chip in a flip chip manner, having a plurality of connection pads to which the semiconductor chip is connected, an insulating pattern formed so as to cover a part of the connection pads, and a plurality of dummy patterns for controlling a flow of an underfill infiltrated below the semiconductor chip, characterized in that the plurality of dummy patterns are arranged in staggered lattice shape.