Staggered Memory Die Stack for Reduced Wire Bond Short Risk

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Solution Overview

Problem

Conventional memory die stacks face limitations in the number of dies that can be stacked due to space constraints and increased risk of visual and electrical shorts as the number of wire bonds grows, making it difficult to bond die pads with corresponding substrate pads effectively.

Innovation Solution

The memory device employs a staggered arrangement of memory dies with increased distance between die pads connecting individually to the substrate, and parallel die pads, using a specific distance pattern and angle to avoid wire crossings, allowing for more efficient wire bonding and reduced risk of shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of stacked memory dies is increased to enhance functionality and capacity, then the storage capacity and functionality of electronic devices are improved, but the risk of visual and electrical shorts increases and wire bonding becomes more difficult

Engineering Contradiction:
Improvenumber of stacked memory diesVSAvoidrisk of visual and electrical shorts
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent transitions from a conventional planar wire bonding approach to a three-dimensional staggered stacking arrangement. Memory dies are positioned at different vertical levels and offset horizontally, creating a spatial distribution that separates wire bond paths. This dimensional change allows multiple dies to be interconnected without wire crossings, thereby increasing the number of stacked dies while maintaining reliability by eliminating short risks.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent divides the wire bonding connections into separate, non-intersecting paths for each stacked memory die. Instead of having all wires converge on a single substrate plane, each die's wire bonds are routed through its own spatial zone. This segmentation of connection paths prevents visual and electrical shorts even as the number of stacked dies increases, directly resolving the reliability concern.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If more memory dies are stacked upon each other, then the storage capacity is increased, but the space consumption for wire bonding increases

Engineering Contradiction:
Improvenumber of stacked memory diesVSAvoidspace consumption for wire bonding
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent utilizes vertical stacking with horizontal offsets to create three-dimensional wire bond routing. By distributing dies across multiple vertical levels and offsetting their horizontal positions, the wire bonds naturally separate in space without requiring additional planar area. This dimensional approach allows increased die count without proportionally increasing wire bonding space consumption.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent arranges memory dies in a nested vertical configuration where each die is stacked above the previous one with horizontal offset. This nesting creates a compact tower structure where wire bonds for upper dies pass through the vertical space above lower dies rather than requiring separate lateral space. The nested arrangement efficiently packs multiple dies into a small footprint while minimizing wire bond space requirements.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Quantity of substance

If more memory dies are stacked upon each other, then the functionality is enhanced, but the bonding of die pads with corresponding substrate pads becomes more difficult

Engineering Contradiction:
Improvenumber of stacked memory diesVSAvoidbonding of die pads with substrate pads
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The patent introduces vertical and horizontal offsets in the stacking arrangement, creating distinct spatial zones for each die's pad bonding area. This dimensional separation makes it easier to align and bond die pads to substrate pads for each individual die without interference from adjacent dies. The staggered configuration simplifies the manufacturing process by providing clear access to bonding surfaces even as the number of stacked dies increases.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS7875985B2Memory device
Publication Date: 2011.01.25 SAMSUNG ELECTRONICS CO LTD
  • US7875985B2 patent drawing
  • US7875985B2 patent drawing
  • US7875985B2 patent drawing

AI summary

A memory device comprising at least one memory stack of stacked memory dies which are staggered with respect to each other,each stacked memory die of said memory stack comprising along its edge die pads for bonding said stacked memory die to substrate pads of said memory device connectable to a control circuit,wherein each die pad of a stacked memory die which connects said memory die individually to said control circuit comprises an increased distance (di) in comparison to die pads of said stacked memory die which connect said stacked memory die in parallel with corresponding die pads of other stacked memory dies of said memory stack to said control circuit.