Staggered Metal Line Layout for Higher BEOL Signal Density

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Solution Overview

Problem

As integrated circuits (ICs) move to smaller technology nodes, maintaining and increasing signal density in lower metal layers of the back-end-of-the-line (BEOL) becomes challenging, particularly in forming signal interconnects.

Innovation Solution

A semiconductor interconnect structure is implemented with a first row of metal lines in the bottom portion of a metal layer and a second row of metal lines in the top portion, where the rows are horizontally staggered, increasing signal track density within a single metal layer by up to 50%.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If traditional single-row metal line configuration is used in lower metal layers, then manufacturing process is simple, but signal track density is insufficient to meet performance demands in smaller technology nodes

Engineering Contradiction:
Improvesignal track densityVSAvoidinterconnect structure complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from a single-row horizontal arrangement to a multi-row staggered configuration within the same metal layer. By utilizing both bottom and top portions of the metal layer with horizontally staggered rows, the design effectively adds a vertical dimension to the interconnect layout, thereby increasing signal track density without requiring additional metal layers

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The metal layer is segmented into distinct bottom and top portions, each containing separate rows of metal lines. This segmentation allows independent optimization of each row's position and dimensions, enabling the staggered configuration that maximizes track density while maintaining manufacturability through standard deposition and etching processes

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240170395A1Staggered signal line interconnect structure
Publication Date: 2024.05.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240170395A1 patent drawing
  • US20240170395A1 patent drawing
  • US20240170395A1 patent drawing

AI summary

A semiconductor interconnect structure and formation thereof. The semiconductor interconnect structure includes a first row of metal lines located in a bottom portion of a metal layer and a second row of metal lines located in a top portion of the metal layer. The first row of metal lines are horizontally staggered with respect to the second row of metal lines.