Staggered Refresh Memory System Latency Reduction

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Solution Overview

Problem

In multi-channel memory systems, the alignment of refresh operations across multiple channels leads to significant delays due to large refresh times, which can impact overall system performance and increase latency during fetch operations.

Innovation Solution

Implementing a staggered refresh method where each memory channel refreshes a distinct rank simultaneously, with the memory channel being marked as unavailable and fetch commands blocked during refresh, allowing data to be released and reducing latency associated with refresh penalties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If refresh operations are aligned across multiple channels, then memory consistency is maintained, but system performance degrades due to large refresh times and increased latency

Engineering Contradiction:

Improvememory consistencyVSAvoidsystem performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent divides the memory system into multiple independent channels, each capable of performing refresh operations on distinct ranks simultaneously. This segmentation allows refresh operations to be distributed across channels rather than executed in unison, maintaining memory consistency while reducing the overall impact on system performance.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a temporal dimension to refresh operations by staggering them across different time intervals and channels. Instead of all channels refreshing at the same time (synchronous), channels perform refresh operations at different times (asynchronous), spreading the latency impact across multiple time dimensions and maintaining system responsiveness.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Duration of action of moving object

If all channels perform refresh operations simultaneously, then refresh operations are completed efficiently, but fetch operations experience increased latency

Engineering Contradiction:

Improverefresh completion timeVSAvoidfetch operation latency

Core Design Contradiction:

Duration of action of moving objectVSLoss of time

Solution Approach 1:

The patent segments refresh operations across multiple channels so that not all channels perform refresh simultaneously. Each channel independently manages its own refresh schedule, allowing fetch operations to proceed on channels that are not currently performing refresh, thereby reducing fetch latency while still completing all necessary refresh operations.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent ensures continuous useful action by allowing fetch operations to proceed on channels that are not performing refresh operations. This overlapping of refresh and fetch operations across different channels maintains system productivity and reduces the overall time loss associated with refresh penalties.

Inventive Principle:

Principle #20Continuity of useful action

3Productivity

If fetch commands are allowed during refresh operations, then system responsiveness is maintained, but data integrity may be compromised

Engineering Contradiction:

Improvesystem responsivenessVSAvoiddata integrity

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent segments the memory system into channels with distinct refresh schedules, allowing fetch commands to be directed to channels that are not currently performing refresh operations on the requested ranks. This segmentation maintains data integrity by preventing fetch operations on ranks being refreshed while preserving system responsiveness through parallel channel operation.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces channel marking as an intermediary mechanism that tracks which channels are performing refresh operations on which ranks. This marking system acts as a mediator between refresh and fetch operations, directing fetch commands to appropriate channels that can service requests without compromising data integrity during refresh.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11520659B2Refresh-hiding memory system staggered refresh

Publication Date: 2022.12.06 INTERNATIONAL BUSINESS MACHINE CORPORATION

AI summary

A computer-implemented method includes refreshing a set of memory channels in a memory system substantially simultaneously, each memory channel refreshing a rank that is distinct from each of the other ranks being refreshed. Further, the method includes marking a memory channel from the set of memory channels as being unavailable for the rank being refreshed in the memory channel. In one or more examples, the method further includes blocking a fetch command to the memory channel for the rank being refreshed in the memory channel.