Staggered Semiconductor Contacts for Alignment and Resistance

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Solution Overview

Problem

Current semiconductor device fabrication techniques face challenges in decreasing feature dimensions due to limitations in forming contact holes with sufficient dimensions, leading to misalignment and high contact resistance issues.

Innovation Solution

The use of staggered contacts and a dual damascene methodology, where trenches and apertures are formed to multiple fabrication levels and filled with conductive material, allowing for larger conductive plugs and increased alignment tolerances, along with intermediate structures that serve multiple functions like etch stops and polish stops.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If contact holes are formed in two or more process steps with smaller dimensions at the bottom to prevent misalignment, then alignment precision is improved, but contact resistance increases undesirably

Engineering Contradiction:
Improvealignment precisionVSAvoidcontact resistance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The contact structure is segmented into two distinct parts: a larger-diameter conductive plug at the bottom and a smaller-diameter contact opening at the top. This segmentation allows each part to optimize its function - the large plug ensures low contact resistance while the small opening maintains alignment precision

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The contact opening is nested within the conductive plug structure, with the smaller top opening positioned above the larger bottom plug. This nested configuration allows the contact hole to be aligned with the plug while maintaining different dimensions at different heights to resolve the contradiction between alignment and contact resistance

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If feature dimensions are decreased to increase device density, then device density is improved, but fabrication challenges increase due to etch process limitations

Engineering Contradiction:
Improvedevice densityVSAvoidfabrication difficulty
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The solution moves from a single-dimension approach (uniform contact hole diameter) to a multi-dimensional approach by varying the contact structure dimensions along the vertical axis. The contact has different diameters at different heights, allowing the bottom to be larger for manufacturability while the top remains small for high density

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Length of moving object

If the dimensions across the top surface of conductive plugs are made smaller to maintain pitch, then pitch is reduced, but misalignment occurs and electrical communication is compromised

Engineering Contradiction:
ImprovepitchVSAvoidalignment
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The contact structure is made asymmetric along the vertical axis, with the bottom diameter being larger than the top diameter. This asymmetric design allows the bottom plug to maintain sufficient size for alignment tolerance while the top opening can be smaller to maintain pitch, resolving the contradiction between pitch reduction and alignment precision

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentEP2057676B1Semiconductor devices including fine pitch arrays with staggered contacts and methods for designing and fabricating the same
Publication Date: 2019.11.06 MICRON TECHNOLOGY INC
  • EP2057676B1 patent drawingFigure 1~3
  • EP2057676B1 patent drawingFigure 4~6
  • EP2057676B1 patent drawingFigure 7~9A

AI summary

A semiconductor device structure includes staggered contacts to facilitate small pitches between active-device regions and conductive lines while minimizing one or both of misalignment during fabrication of the contacts and contact resistance between sections of the contacts. The contacts of one row communicate with every other active-device region and are staggered relative to the contacts of another row, which communicate with the remaining active-device regions. Each contact may include a relatively large contact plug with a relatively large upper surface to provide a relatively large amount of tolerance as a contact hole for an upper portion of the contact is formed. The contact holes may be formed substantially simultaneously with trenches for conductive traces, such as bit lines, in a dual damascene process. Intermediate structures are also disclosed, as are methods for designing semiconductor device structures.