Staggered Sub-Transistor Switching for Peak Power Control

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Solution Overview

Problem

Conventional semiconductor components face challenges in efficiently operating without exceeding maximum energy strength, particularly during high inductive voltages in power converters or motor drives, where the product of voltage drop and transistor current reaches high values.

Innovation Solution

A semiconductor component with monolithically integrated sub-transistors, where the first sub-transistor is switched ON at a first time and the second sub-transistor is switched ON at a second time, allowing for adaptive resistance control through independent control contacts, enabling efficient operation by managing the ON-state resistance of the main load path.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single transistor is used to supply electric power to an inductive load, then the circuit structure is simple, but the product of voltage drop and transistor current transiently reaches high values during off-commutation, exceeding maximum energy strength

Engineering Contradiction:
Improvecircuit structureVSAvoidpower dissipation
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

The patent divides a single transistor into multiple sub-transistors (first sub-transistor and second sub-transistor) with separate control contacts. This segmentation allows independent control of each sub-transistor, enabling staggered switching operations that reduce peak power dissipation during commutation while maintaining the overall circuit structure

Inventive Principle:
Principle #1Segmentation

2Power

If multiple sub-transistors are used with independent control, then power dissipation is reduced through time-shifted switching, but the device structure becomes more complex

Engineering Contradiction:
Improvepower dissipationVSAvoidtransistor structure
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent merges multiple sub-transistors into a single monolithically integrated transistor structure in the semiconductor body. This combining approach achieves the power reduction benefits of multiple independently controlled transistors while maintaining a compact, integrated device structure rather than using discrete components

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If the transistor is switched ON quickly to improve response time, then the switching speed increases, but the voltage drop and current product reaches higher peak values

Engineering Contradiction:
Improveswitching speedVSAvoidpeak power
Core Design Contradiction:
SpeedVSPower

Solution Approach 1:

The patent employs periodic or sequential switching action where the first and second sub-transistors are switched ON at different times rather than simultaneously. This time-shifted periodic switching maintains fast response while distributing the power dissipation over time, avoiding simultaneous peak current and voltage overlap

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10153762B2Method for controlling a semiconductor component
Publication Date: 2018.12.11 INFINEON TECHNOLOGIES AG
  • US10153762B2 patent drawing
  • US10153762B2 patent drawing
  • US10153762B2 patent drawing

AI summary

A transistor monolithically integrated in a semiconductor body includes a first sub-transistor and a second sub-transistor that both include a first and second load contacts and a control contact for controlling an electric current through a load path. The first load contact of the first sub-transistor is electrically connected to the first load contact of the second sub-transistor and the second load contact of the first sub-transistor is electrically connected to the second load contact of the second sub-transistor. A control circuit is configured to cause the first sub-transistor to switch from a first state to a second state at a first point of time and to cause the second sub-transistor to switch from the first state to the second state at a second point of time subsequent to the first point of time.