Staggered Switching Control for Parallel Power Semiconductor Devices

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Solution Overview

Problem

Power semiconductor devices connected in parallel face increased switching losses due to simultaneous switching, which is exacerbated by higher rated voltages and currents, and existing methods either focus on reducing turn-on or turn-off losses without considering both or are not applicable when semiconductor elements have similar characteristics.

Innovation Solution

A power semiconductor device with first and second elements connected in parallel, along with a drive control unit that allows for simultaneous or staggered switching based on current magnitude, enabling independent timing of turn-on and turn-off operations to minimize switching losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a plurality of power semiconductor elements are connected in parallel to increase current capacity, then the current handling capability is improved, but switching loss increases due to simultaneous switching of all elements

Engineering Contradiction:
Improvecurrent capacityVSAvoidswitching loss
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent divides the simultaneous switching operation into segmented, staggered switching operations. Each power semiconductor element is switched at different time points rather than simultaneously, which reduces the peak switching loss while maintaining the total current capacity of the parallel-connected elements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces dynamic control of switching timing for each parallel-connected power semiconductor element. The switching timing is adjusted based on operating conditions such as current magnitude, allowing the system to optimize switching loss dynamically while maintaining current handling capability.

Inventive Principle:
Principle #15Dynamics

2Productivity

If switching frequency is increased to improve productivity, then the response speed is improved, but switching loss increases due to more frequent switching operations

Engineering Contradiction:
Improveresponse speedVSAvoidswitching loss
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent implements dynamic switching timing control where the switching moments of parallel elements are adjusted based on real-time operating conditions. This allows high switching frequency operation to maintain fast response while reducing peak switching loss through optimized timing sequences.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs periodic switching patterns with optimized timing intervals for each parallel element. By structuring the switching operations in periodic sequences with staggered timing, the system achieves high-frequency operation while distributing switching losses over time rather than concentrating them.

Inventive Principle:
Principle #19Periodic action

3Loss of energy

If existing methods use different IGBT characteristics (low saturation voltage with long fall time vs. high saturation voltage with short fall time) to reduce turn-off loss, then turn-off loss is reduced, but the method becomes inapplicable when elements have similar characteristics

Engineering Contradiction:
Improveturn-off lossVSAvoidapplicability to similar elements
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent applies preliminary timing offset control to the switching signals of parallel elements before the actual switching event. By pre-positioning the switching moments at different times, the system reduces turn-off loss without requiring elements to have different characteristics, making the method universally applicable to identical or similar power semiconductor elements.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the timing parameter of switching operations rather than relying on inherent differences in element characteristics. By adjusting the temporal parameter (switching timing) instead of requiring variations in electrical parameters (saturation voltage, fall time), the method becomes applicable to elements with similar or identical characteristics while still achieving reduced turn-off loss.

Inventive Principle:
Principle #35Parameter changes

4Loss of energy

If staggered switching is implemented to reduce switching loss, then energy consumption is reduced, but control complexity increases

Engineering Contradiction:
Improveswitching lossVSAvoidcontrol complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent uses dynamic control strategies that adjust switching timing based on operating conditions. While this increases control complexity compared to simultaneous switching, the complexity is managed through algorithmic approaches that can be implemented in control software or microcontrollers, balancing the trade-off between reduced switching loss and increased control complexity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS8766702B2Power semiconductor device having plurality of switching elements connected in parallel
Publication Date: 2014.07.01 MITSUBISHI ELECTRIC CORP
  • US8766702B2 patent drawing
  • US8766702B2 patent drawing
  • US8766702B2 patent drawing

AI summary

A power semiconductor device includes first and second power semiconductor elements connected in parallel to each other and a drive control unit. The drive control unit turns on or off each of the first and second power semiconductor elements in response to an ON instruction and an OFF instruction repeatedly received from outside. Specifically, the drive control unit can switch between a case where the first and second power semiconductor elements are simultaneously turned on and a case where one of the first and second power semiconductor elements is turned on first and thereafter the other thereof is turned on, in response to the ON instruction. The drive control unit turns off one of the first and second power semiconductor elements first and thereafter turns off the other thereof, in response to the OFF instruction.