Stair-Shaped Lead Structure for Dense Semiconductor Bump Isolation

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Solution Overview

Problem

The increasing density of connection terminals in semiconductor packages leads to a higher risk of electrical shorts due to reduced isolation intervals between conductive bumps, which can result in unwanted electrical connections and performance degradation.

Innovation Solution

A semiconductor package design featuring first and second leads with a stair shape on a substrate, where the leads are spaced apart and connected via bumps and solder layers, with the stair shape of the leads acting as barriers to prevent solder extrusion and reduce the risk of electrical shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the density of connection terminals is increased to reduce package size, then the integration and performance of the semiconductor package is improved, but the isolation interval between bumps is reduced leading to increased risk of electrical shorts

Engineering Contradiction:
Improveintegration densityVSAvoidelectrical isolation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The lead structure transitions from a flat two-dimensional plane to a three-dimensional stair-shaped configuration with multiple levels. This vertical dimensionality change creates additional isolation space between adjacent leads while maintaining the same planar footprint, thereby preventing solder extrusion-induced shorts without sacrificing connection terminal density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The lead is divided into multiple stepped segments at different height levels rather than being a single continuous structure. This segmentation creates physical barriers between adjacent leads, isolating the solder joints and preventing electrical shorts while allowing high-density terminal arrangement.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If the pitch between connection terminals is reduced to increase terminal count, then more I/O terminals can be formed within limited area, but the risk of short between adjacent bumps increases

Engineering Contradiction:
Improvenumber of connection terminalsVSAvoidshort risk
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

By introducing vertical height differences through stair-shaped leads, the patent creates additional protective space between adjacent bumps in the vertical dimension, allowing closer horizontal spacing without increasing short risk.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The stair-shaped lead structure acts as an intermediary barrier between adjacent solder joints. The elevated portions of the leads serve as physical mediators that prevent direct contact between extruding solder from adjacent bumps, thereby eliminating the harmful short effect.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If conventional flat leads are used with high-density bumps, then manufacturing is simpler, but solder extrusion causes electrical shorts between adjacent solder layers

Engineering Contradiction:
Improvelead fabricationVSAvoidelectrical isolation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The lead structure incorporates vertical height variations through stair-shaped configuration, creating natural barriers that prevent solder extrusion shorts. This three-dimensional design maintains compatibility with conventional manufacturing processes while significantly improving reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The stair-shaped leads effectively suppress solder extrusion and reduce the likelihood of electrical shorts between adjacent solder layers, enhancing the reliability and performance of the semiconductor package by maintaining electrical isolation and preventing unwanted connections.

Implementation Method 1

a solder layer configured to connect the bump and the first lead

Methodology Applied
Scientific EffectSoldering: Soldering

Data Source

PatentUS20240162176A1Semiconductor package including bump interconnection structure
Publication Date: 2024.05.16 SK HYNIX INC
  • US20240162176A1 patent drawing
  • US20240162176A1 patent drawing
  • US20240162176A1 patent drawing

AI summary

A semiconductor package includes a bump interconnection structure. The semiconductor package includes a first lead and a second lead spaced apart from each other on a first substrate, a bump disposed to face the first lead in a second substrate, and a solder layer configured to connect the bump and the first lead. The first lead has a stair shape that ascends toward the second lead.