Stair-Stacked Memory Module Chip-Scale Package Design
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Solution Overview
Problem
The challenge in computing devices such as smartphones and tablets is the limited available space, which poses difficulties for packaging due to size constraints, necessitating innovative solutions for compact chip-scale packaging of systems-in-package (SiP) devices.
Innovation Solution
The implementation of a stair-stacked memory module chip-scale package (PPSSMM) that includes a memory first die with an orthogonal vertical wire bonded to a package substrate, along with a processor die and additional components, using a unique bond-pad pitch configuration and redistribution layer (RDL) to facilitate efficient assembly and mounting on a substrate or board, allowing for compact and effective integration of multiple components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If traditional packaging methods are used, then component integration is achieved, but device size becomes too large for mobile computing devices
Solution Approach 1:
The patent implements a three-dimensional stair-stacked architecture where memory dice are arranged in multiple vertical layers (first layer with first and second memory dice, second layer with third and fourth memory dice) connected via vertical bond wires. This vertical stacking in the Z-dimension reduces the planar footprint on the package substrate, enabling compact integration suitable for mobile devices while maintaining complex functionality through multi-layer component arrangement.
Solution Approach 2:
The patent embeds multiple components within a molded matrix structure that encapsulates the stair-stacked memory module. The matrix material (mold compound) surrounds and protects the memory dice, bond wires, and interconnections, creating a nested configuration where smaller components are contained within a protective outer structure. This nesting approach consolidates multiple components into a single integrated package unit.
2Volume of moving object
If component size is reduced to fit mobile devices, then device portability improves, but packaging precision requirements increase
Solution Approach 1:
The patent employs preliminary positioning structures including bond pads pre-formed on the package substrate and memory dice with pre-configured bond wire attachment points. The vertical bond wires are pre-routed through the matrix material to connect specific memory dice layers before final encapsulation. This preliminary arrangement of connection points and pathways establishes precise alignment requirements early in the manufacturing process, enabling accurate bonding despite the compact package dimensions.
Solution Approach 2:
The patent implements different pitch configurations for bond pads in different regions of the package substrate. The first bond pad array has a first pitch while the second bond pad array has a second pitch, allowing optimization of bonding precision for specific connection requirements. This local variation in geometric parameters enables precise component placement and wiring alignment in the compact stair-stacked architecture without requiring uniform high-precision features across the entire package.
3Productivity
If multiple components are integrated in a compact arrangement, then packaging efficiency improves, but connection reliability becomes more difficult to maintain
Solution Approach 1:
The patent transitions from planar two-dimensional component arrangement to three-dimensional vertical stacking, with memory dice arranged in multiple layers connected by vertical bond wires extending through the matrix. This dimensional change allows multiple memory components to be integrated within a compact volume while maintaining reliable electrical connections through the vertical wiring architecture, achieving both high packaging efficiency and connection reliability.
Solution Approach 2:
The patent introduces a molded matrix material as an intermediary that encapsulates and protects the vertical bond wires connecting memory dice across different layers. The matrix material provides mechanical support and environmental protection for the delicate wire connections, ensuring connection reliability while enabling the compact multi-layer integration. The matrix acts as a protective medium that maintains the integrity of inter-component connections in the dense stair-stacked configuration.
Data Source
AI summary
A pre-packaged stair-stacked memory module is mounted on a board with at least one additional component. A stair-stacked memory module includes a plurality of memory dice that are stacked vertically with respect to a processor die. A spacer is used adjacent to the processor die to create a bridge for the stair-stacked memory module. Each memory die in the stair-stacked memory module includes a vertical bond wire that emerges from a matrix for connection. The matrix encloses the stair-stacked memory module and at least a portion of the processor die. The matrix might also enclose the at least one additional component.