Stair-Step Pad Structure for Over-Etch-Resistant Contact Openings

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Solution Overview

Problem

The challenge in 3D memory devices is the electrical failure caused by over-etching during the formation of contact openings, which results in undesired bridging between contacts and conductive layers due to the varying distances of pads from the top surface of dielectric layers.

Innovation Solution

A semiconductor structure with pads having a conductive pillar embedded in a material pair and a thicker pad layer on top, acting as an etching stop layer to prevent over-etching, and improve the process window and yield during contact opening formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional thin pads are used in stair step structure, then the device can be manufactured with standard processes, but over-etching occurs during contact opening formation causing electrical failure

Engineering Contradiction:
Improveelectrical reliabilityVSAvoidcontact opening precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The pad thickness is increased from conventional thin dimensions to a thicker configuration (e.g., 50-200 nm range). This parameter change provides sufficient etching stop capability during contact opening formation, preventing over-etching that would otherwise penetrate through the pad to create unwanted bridges with underlying conductive layers, thereby ensuring electrical reliability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The thicker pad structure is formed in advance as part of the interconnect stack before contact opening formation. This preliminary action establishes a robust etching stop layer that prevents over-etching issues during subsequent processing steps, improving both manufacturing precision and electrical reliability

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If pad thickness is increased to prevent over-etching, then etching stop capability is improved, but the device complexity increases

Engineering Contradiction:
Improveetching stop capabilityVSAvoidpad structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The pad and etching stop layer functions are merged into a single integrated structure. The thick pad simultaneously serves as both the electrical connection element and the etching stop layer, eliminating the need for separate etching stop layers and reducing overall device complexity while maintaining excellent etching stop capability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The thick pad structure performs multiple functions: it provides electrical connection between interconnect layers and serves as an etching stop layer during contact opening formation. This multi-functionality reduces the need for additional dedicated structures, thereby managing device complexity while achieving superior etching control

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12406922B2Semiconductor structure and manufacturing method thereof
Publication Date: 2025.09.02 MACRONIX INTERNATIONAL CO LTD
  • US12406922B2 patent drawing
  • US12406922B2 patent drawing
  • US12406922B2 patent drawing

AI summary

A semiconductor structure including a substrate and a pad structure is provided. The pad structure is located on the substrate. The pad structure includes material pairs and pads. The material pairs are stacked on the substrate to form a stair step structure. Each of the material pairs includes a conductive layer and a dielectric layer located on the conductive layer. Each of the pads includes a conductive pillar and a pad layer. The conductive pillar is embedded in the material pair and is connected to the conductive layer of the material pair. The pad layer is located on the conductive pillar.