Stair Step Pad Structure Prevents Over-etching in 3D Memory
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Solution Overview
Problem
In 3D memory devices, the stair step pad structure is prone to over-etching during contact opening formation, leading to electrical failures due to height differences between pads and the dielectric layer, which complicates interconnection and reduces yield.
Innovation Solution
A pad structure with a stair step design featuring thicker pads and plugs, where each pad is embedded in a material pair with a dielectric layer, and the pads serve as etching stops to prevent over-etching, along with a manufacturing method that includes patterning and filling processes to ensure accurate placement and connection of conductive layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a stair step pad structure is used in 3D memory devices, then the memory capacity per unit area is increased, but the pads are prone to over-etching during contact opening formation due to height differences between pads at different locations
Solution Approach 1:
The pad structure is segmented into multiple material pairs (conductive layer and dielectric layer) stacked vertically. Each material pair forms a distinct stair step, allowing the pad to be divided into multiple levels that can be etched independently, thereby preventing over-etching while maintaining high density interconnection.
Solution Approach 2:
The pad structure transitions from a two-dimensional planar layout to a three-dimensional stacked configuration. By adding the vertical dimension with multiple material pairs, the design achieves higher memory capacity per unit area while the stepped configuration provides etching stops at different heights to prevent over-etching.
2Productivity
If the pads are made thinner to reduce material usage, then the fabrication cost is reduced, but the pads become more susceptible to damage during the etching process
Solution Approach 1:
Thicker pads are designed with sufficient thickness to serve as etching stops before the contact opening etch reaches the conductive layer below. This pre-designed thickness buffer prevents accidental penetration and pad damage during the etching process, ensuring pad integrity while maintaining efficient fabrication.
3Device complexity
If the height difference between pads at different locations is increased to accommodate more interconnections, then the device complexity is reduced, but the top pad becomes more prone to over-etching
Solution Approach 1:
The pad is segmented into multiple material pairs with different heights, creating a stepped structure. Each stair step corresponds to a specific interconnection level, allowing complex interconnections to be achieved while maintaining precise etching control at each level through the stepped configuration.
Solution Approach 2:
Different portions of the pad structure have different local properties - each material pair has specific thickness and material composition optimized for its local function. The dielectric layers provide insulation at specific locations while conductive layers provide interconnection, allowing precise control of etching at each local region.
Data Source
AI summary
A pad structure including a plurality of material pairs and a plurality of pads is provided. The material pairs are stacked on a substrate to form a stair step structure. A stair step of the stair step structure includes one of material pairs. Each of the material pairs includes a conductive layer and a dielectric layer on the conductive layer. Each of the pads is embedded in one stair step of the stair step structure and exposed by the dielectric layer corresponding to the one stair step and another stair step above the one stair step. A thickness of one of the pads is greater than a thickness of one of the conductive layers.


