Staircase FEC Block Coding for High-Gain Low-Latency OTN
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Solution Overview
Problem
Current Forward Error Correction (FEC) coding schemes in Optical Transport Networks (OTN) face challenges in achieving higher coding gains without requiring impractical additional processing resources, particularly in maintaining reliable communications and allowing signal transmission at lower power levels.
Innovation Solution
The implementation of a staircase Forward Error Correction (FEC) coding scheme, which involves recursively encoding symbol blocks using a product code construction, allowing for variable latency and achieving high coding gains by forming valid codewords through the concatenation of data and coding symbols across multiple symbol blocks, thereby enhancing burst error correction and maintaining low latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional FEC coding schemes are used in OTN, then implementation is straightforward with standardized processing, but coding gain is limited to 6.2 dB
Solution Approach 1:
The patent segments the data stream into blocks and applies product code construction with multiple encoding passes (row encoding and column encoding). This segmentation allows achieving higher coding gain (up to 9.4 dB) by creating redundant parity symbols across both dimensions, while keeping each individual encoding pass relatively simple and systematic.
Solution Approach 2:
The patent implements nested encoding where column encoding is applied to the output of row encoding, creating a layered redundancy structure. The first encoding pass generates row parity symbols, and the second pass generates column parity symbols that protect both data and row parity symbols. This nested approach achieves higher reliability through multiple layers of error protection.
2Reliability
If enhanced FEC coding schemes with higher coding gain are implemented, then more errors can be corrected, but processing resources become impractical
Solution Approach 1:
By segmenting data into blocks and applying systematic product code encoding, the patent distributes error correction capability across multiple manageable encoding passes rather than requiring a single complex encoder. This allows achieving up to 9.4 dB coding gain while keeping each encoding stage practical to implement.
Solution Approach 2:
The patent changes the coding rate parameter to 239/255, achieving higher coding gain compared to conventional schemes. This parameter change is achieved through product code construction with specific block dimensions and redundancy ratios, balancing improved error correction with practical processing requirements.
3Use of energy by stationary object
If higher coding gain is achieved through enhanced FEC, then signals can be transmitted at lower power levels, but processing complexity increases
Solution Approach 1:
The patent uses segmented block encoding with product code construction to achieve higher coding gain (up to 9.4 dB), which enables lower signal transmission power levels. The segmentation into manageable blocks with systematic encoding passes keeps processing complexity practical while maximizing energy efficiency.
Solution Approach 2:
By changing the coding rate to 239/255 through product code construction, the patent achieves higher coding gain that directly translates to reduced transmission power requirements, while maintaining practical processing complexity through systematic encoding approaches.
Data Source
AI summary
In staircase forward error correction coding, a stream of data symbols are mapped to data symbol positions in a sequence of two-dimensional symbol blocks Bi, a positive integer. Each of the symbol blocks has data symbol positions and coding symbol positions. Coding symbols for the coding symbol positions in each symbol block Bi in the sequence are computed. The coding symbols are computed such that, for each symbol block Bi that has a preceding symbol block Bi−1 and a subsequent symbol block Bi+1 in the sequence, symbols at symbol positions along one dimension of the preceding symbol block Bi−1, concatenated with the data symbols and the coding symbols along the other dimension in the symbol Bi, form a codeword of a FEC component code, and symbols at symbol positions along the one dimension of the symbol Bi, concatenated with the data symbols and the coding symbols along the other dimension in the subsequent symbol block Bi+1, form a codeword of the FEC component code. Thus, each row in [Bi−1T Bi] and each column in[BiBi+1T],for example, is a valid codeword.