Staircase Insulating Layers for Etching Control in 3D Memory

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Solution Overview

Problem

The manufacturing of semiconductor devices with three-dimensional memory cell arrays faces challenges in connecting contact plugs to conductive layers due to thickness differences in interlayer insulating films on staircase portions, leading to overetching and underetching issues, which complicates the process and increases costs.

Innovation Solution

A semiconductor device design featuring a stacked body with conductive and insulating layers, where a second insulating layer acts as an etching stopper and a third insulating layer is embedded between the conductive and insulating layers, allowing for uniform contact plug formation without additional lithography processes, thereby simplifying the manufacturing process and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If an etching stopper film is formed on the staircase portion after forming the staircase pattern, then etching control is improved, but the manufacturing process becomes longer and costs increase due to additional lithography processes

Engineering Contradiction:
Improveetching controlVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The etching stopper film is formed in advance during the stacked body formation process, before the staircase pattern is created. This preliminary formation eliminates the need for subsequent lithography processes to add the stopper film, thereby reducing manufacturing complexity while maintaining etching control precision.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The formation of the etching stopper film is merged with the formation of the stacked body structure. By creating the stopper film as part of the initial layer stacking process rather than as a separate subsequent step, the manufacturing process is simplified and overall process time is reduced.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If the etching stopper film is formed along the staircase shape, then etching protection is provided, but the film protrudes to the contact region causing non-uniform thickness and connection difficulties

Engineering Contradiction:
Improveetching protectionVSAvoidcontact connection reliability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The etching stopper film is positioned selectively only on the upper surface of the insulating layer in the staircase portion, rather than conformally covering all surfaces. This localized placement provides etching protection where needed while preventing protrusion into the contact region, ensuring uniform contact region thickness and reliable connections.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The etching stopper film placement is segmented to be present only in specific locations (on the upper surface of the insulating layer) and absent in others (not on the side surfaces). This selective segmentation allows the film to provide protection without interfering with contact formation in critical regions.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables reliable and efficient connection of contact plugs to conductive layers, preventing overetching and underetching, and streamlines the manufacturing process while maintaining cost-effectiveness.

Implementation Method 1

a second insulating layer different in material from the first insulating layer is provided on an upper surface of the first insulating layer of the staircase portion

Methodology Applied
Scientific EffectEtching stopper:

Data Source

PatentUS10707227B2Semiconductor device and method for manufacturing the same
Publication Date: 2020.07.07 KIOXIA CORP
  • US10707227B2 patent drawing
  • US10707227B2 patent drawing
  • US10707227B2 patent drawing

AI summary

A semiconductor device includes a stacked body including conductive layers and first insulating layers which are alternately stacked. The stacked body includes, on at least one side thereof, a staircase portion having stairs formed from the conductive layers and the first insulating layers. A second insulating layer different in material from the first insulating layer is provided on an upper surface of the first insulating layer of the staircase portion. The second insulating layer is away from the conductive layer on the same first insulating layer. A third insulating layer is provided on the staircase portion. Contacts are provided in the first, second, and third insulating layers situated in the respective stairs of the staircase portion. The contacts lead from an upper surface of the third insulating layer to the conductive layer under the first insulating layer.