Staircase Memory Isolation Structures for Void-Free Electrical Contact

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Solution Overview

Problem

Conventional vertical memory arrays face challenges in increasing memory density without increasing the overall width of the stack structure, leading to complex and congested routing paths and insufficient electrical isolation due to voids in insulative materials over staircase structures.

Innovation Solution

A microelectronic device structure with a stack of vertically alternating conductive and insulative structures, including a staircase structure with steps, where a first insulative material overlies the staircase and conductive contact structures extend through it, and isolation structures made of a second insulative material with different properties fill seams and trenches to ensure electrical isolation between neighboring conductive contact structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the quantity of tiers of conductive structures is increased to provide additional memory density, then memory density is improved, but the routing paths to electrically connect the conductive structures to additional components become complex and congested

Engineering Contradiction:
Improvememory densityVSAvoidrouting path complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from planar routing to three-dimensional routing by introducing staircase structures that extend vertically. Conductive contact structures are positioned on steps at different vertical levels, allowing electrical connections to be made in the vertical dimension rather than requiring complex lateral routing paths. This dimensional change enables additional memory tiers to be connected without increasing lateral routing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If the height of the stack structure is increased to provide additional memory density, then memory density is improved, but insulative materials overlying the staircase structures exhibit voids due to high aspect ratio

Engineering Contradiction:
Improvememory densityVSAvoidinsulative material void formation
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent divides the insulative material formation into multiple segments or layers. Instead of forming a single continuous insulative material layer over the entire staircase structure (which creates high aspect ratio voids), the insulative material is formed in separate segments that can be properly deposited and cured, eliminating void formation while maintaining electrical isolation.

Inventive Principle:
Principle #1Segmentation

3Reliability

If insulative materials are formed over high aspect ratio staircase structures, then electrical isolation is intended, but voids result in insufficient electrical isolation between conductive contact structures

Engineering Contradiction:
Improveelectrical isolationVSAvoidvoid formation in insulative material
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The insulative material is formed in multiple segmented layers rather than as a single continuous layer. This segmentation allows each layer to be properly deposited and cured without creating high aspect ratio voids, ensuring complete electrical isolation between conductive contact structures while maintaining manufacturing feasibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The segmented insulative material layers act as intermediaries between adjacent conductive contact structures. Each insulative layer segment provides a barrier that prevents electrical coupling, and the segmentation ensures complete coverage without voids that would compromise the isolating function.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11637178B2Microelectronic devices including isolation structures neighboring staircase structures, and related memory devices, electronic systems, and methods
Publication Date: 2023.04.25 MICRON TECHNOLOGY INC
  • US11637178B2 patent drawing
  • US11637178B2 patent drawing
  • US11637178B2 patent drawing

AI summary

A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, a staircase structure within the stack structure having steps comprising horizontal edges of the tiers, a first insulative material vertically overlying the staircase structure, conductive contact structures comprising a conductive material extending through the first insulative material and in contact with the steps of the staircase structure, and a second insulative material extending in a first horizontal direction between horizontally neighboring conductive contact structures and exhibiting one or more different properties than the first insulative material. Related microelectronic devices, electronic systems, and methods are also described.