Memory Staircase Tungsten Pad Structure for Punch-Through Prevention

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional methods for forming vertical memory arrays in microelectronic devices, such as 3D NAND Flash memory devices, face issues like conductive contact structure punch-through and material inconsistencies due to incomplete replacement of dielectric pad structures, leading to performance and reliability concerns.

Innovation Solution

The method involves forming a microelectronic device with a stack structure having a staircase structure, where a doped semiconductive liner material is converted into a tungsten liner material, and vertically extending portions are removed to create discrete tungsten pad structures, which are then used to form conductive contact structures, thereby avoiding punch-through and enhancing structural integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional methods are used to form conductive contact structures on staircase steps, then memory density can be increased, but punch-through damage occurs causing current leakage and short circuits

Engineering Contradiction:
Improvememory densityVSAvoiddevice reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by forming a doped semiconductive liner material on the staircase steps before forming the conductive contact structures. This liner material serves as a protective layer that prevents punch-through damage during subsequent processing steps, while still allowing the conductive contact structures to be formed and achieve electrical connection. The liner material is subsequently converted to a conductive material, ensuring both protection and electrical functionality.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If dielectric pad structures are formed on sacrificial insulative structures to mitigate punch-through, then punch-through is reduced, but incomplete replacement of dielectric pad structures causes material inconsistencies and voiding

Engineering Contradiction:
Improvepunch-through mitigationVSAvoidmaterial consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by using a doped semiconductive liner material with specific doping concentrations and material properties that enable complete replacement during gate last processing. The doping parameters are optimized to ensure the liner material can be fully replaced with conductive material without leaving voids or inconsistencies, while maintaining structural integrity throughout the process.

Inventive Principle:
Principle #35Parameter changes

3Shape

If symmetric staircase structures are used in preliminary stack structure, then structural symmetry is achieved, but incomplete replacement of dielectric pad structures occurs causing defects

Engineering Contradiction:
Improvestaircase symmetryVSAvoidreplacement completeness
Core Design Contradiction:
ShapeVSManufacturing precision

Solution Approach 1:

The patent applies local quality by introducing doped semiconductive liner material with specific local properties at the staircase steps. The doping concentration and material composition are locally optimized to ensure complete replacement during processing, while the overall symmetric staircase structure is maintained. The local modification of the liner material properties enables complete replacement without compromising the global structural symmetry.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the risk of undesirable damage and current leakage, improving the reliability and durability of microelectronic devices by ensuring complete replacement of insulative structures with conductive materials and maintaining the structural integrity of the staircase structure.

Implementation Method 1

a doped semiconductive liner material is formed on the steps of the staircase structure. Vertically extending portions of the doped semiconductive liner material are converted into a tungsten liner material

Methodology Applied
Scientific EffectPhase transition: Phase Change

Data Source

PatentUS11894305B2Microelectronic devices including staircase structures, and related memory devices and electronic systems
Publication Date: 2024.02.06 MICRON TECHNOLOGY INC
  • US11894305B2 patent drawing
  • US11894305B2 patent drawing
  • US11894305B2 patent drawing

AI summary

A microelectronic device includes a stack structure, a staircase structure, conductive pad structures, and conductive contact structures. The stack structure includes vertically alternating conductive structures and insulating structures arranged in tiers. Each of the tiers individually includes one of the conductive structures and one of the insulating structures. The staircase structure has steps made up of edges of at least some of the tiers of the stack structure. The conductive pad structures are on the steps of the staircase structure and include beta phase tungsten. The conductive contact structures are on the conductive pad structures. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.