Staircase Structure Dimensional Accuracy in Semiconductor Memory

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Solution Overview

Problem

The existing methods for forming a staircase structure in semiconductor memory devices suffer from dimensional accuracy issues due to repeated etching and sliming processes, leading to increased layout area and manufacturing costs, as they require thick and high-viscosity resist films.

Innovation Solution

A semiconductor device with a staircase structure is fabricated using a method where multiple resist films are applied and etched in a way that reduces the number of sliming and etching processes, allowing for simultaneous formation of step pairs with different heights, thereby improving dimensional accuracy and reducing manufacturing time and cost.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If repeated etching and sliming processes are used to form the staircase structure, then the contact plug can be connected to each word line, but the dimensional accuracy of the staircase structure is deteriorated

Engineering Contradiction:

Improvedimensional accuracy of staircase structureVSAvoidnumber of etching and sliming processes

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The staircase structure is divided into multiple step pairs, where each step pair includes a first step part and a second step part. This segmentation allows different regions to be formed with different numbers of etching processes, improving dimensional accuracy while managing process complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different step pairs are subjected to different numbers of etching and sliming processes based on their specific requirements. Some step pairs require more processes than others, allowing optimal dimensional accuracy to be achieved locally rather than uniformly across the entire structure.

Inventive Principle:

Principle #3Local quality

2Manufacturing precision

If the length or width of the tread of the staircase structure is increased to handle dimensional variation, then the dimensional accuracy is improved, but the layout area of the semiconductor memory is increased

Engineering Contradiction:

Improvedimensional accuracy of staircase structureVSAvoidlayout area of semiconductor memory

Core Design Contradiction:

Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The invention changes the process parameters by varying the number of etching and sliming processes applied to different step pairs, rather than increasing the physical dimensions of the treads. This allows dimensional accuracy to be improved through process control rather than geometric scaling.

Inventive Principle:

Principle #35Parameter changes

3Manufacturing precision

If multiple sliming processes are performed to handle dimensional variation, then the staircase structure can be formed, but the manufacturing cost is increased

Engineering Contradiction:

Improvedimensional accuracy of staircase structureVSAvoidmanufacturing cost

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The staircase structure is segmented into multiple step pairs with different etching depths. This allows the total number of sliming processes to be reduced compared to forming a uniform deep staircase, as each step pair can be optimized independently, thereby reducing manufacturing cost while maintaining dimensional accuracy.

Inventive Principle:

Principle #1Segmentation

4Device complexity

If thick and high-viscosity resist film is used to enable multiple sliming processes, then the staircase structure can be formed, but the manufacturing cost is increased

Engineering Contradiction:

Improvecapability to perform multiple sliming processesVSAvoidmanufacturing cost

Core Design Contradiction:

Device complexityVSEase of manufacture

Solution Approach 1:

The invention changes the approach by varying the number of etching processes applied to different step pairs rather than relying on thick high-viscosity resist films. This allows multiple sliming processes to be avoided, reducing the need for specialized resist materials and thereby lowering manufacturing cost.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10991712B2Semiconductor device and manufacturing method thereof

Publication Date: 2021.04.27 KIOXIA CORP

AI summary

An end of a stacked-structure of conductive and insulating layers above a substrate has a staircase structure. The staircase includes a step pair. The risers of steps are opposed to each other. The step pairs are provided at different levels in the form in the staircase. First contact-plugs are provided on treads of respective steps of the first step part. A second contact-plug is provided in either an intermediate region between the first and the second steps of the step pair or the second step to extend in the stacked structure in a direction in which the conductive and insulating layers are stacked. A CMOS circuit is provided below the stacked structure and is connected to the second contact-plug. The second contact-plug is provided in either the intermediate region on which the first contact-plug is not formed or the second step on which the first contact-plug is not formed.