Staircase Spacer Patterning for Sub-12 Nm Pitch Quadrupling
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Solution Overview
Problem
Current pitch reduction techniques, such as double patterning and self-aligned spacer double patterning, face limitations in achieving ultra-fine resolutions for semiconductor feature sizes below 14 nanometers, particularly in forming fine trench and hole patterns with precise line-to-space ratios.
Innovation Solution
The method involves repeating a pitch doubling step twice and introducing a reversal layer to form a fine trench pattern and hole pattern, using a series of etching processes and spacer formations to achieve a line-to-space ratio of 1:1, allowing for the creation of ultra-fine features by transferring relief patterns through multiple layers with precise control over line widths and spacings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional pitch reduction techniques (double patterning, SADP) are used, then photolithography capabilities can be extended beyond feature size limitations, but manufacturing precision and line edge roughness deteriorate for features below 14 nanometers
Solution Approach 1:
The patent segments the pitch reduction process into multiple distinct stages: forming initial mandrels with a first line-to-space ratio (5:3), selectively etching to create recesses, depositing spacers in a staircase configuration, and transferring the pattern through multiple layers. This segmentation allows each stage to be optimized independently, achieving ultra-fine features while maintaining manufacturing precision and reducing line edge roughness
Solution Approach 2:
The patent introduces a vertical dimension by creating a staircase spacer configuration with multiple deposition layers at different heights. This multi-layer spacer structure enables precise lateral pattern definition through vertical etch selectivity, achieving 1:1 line-to-space ratios with superior edge control that cannot be obtained through conventional planar patterning methods
2Manufacturing precision
If pitch doubling steps are repeated twice for pitch quadrupling, then ultra-fine resolutions can be obtained, but process complexity increases
Solution Approach 1:
The patent merges multiple pitch multiplication operations into a unified process flow where the first pitch doubling step and second pitch doubling step are integrated through the staircase spacer mechanism. The spacers formed in the first step serve as mandrels for the second step, eliminating the need for separate lithography and etching cycles that would otherwise be required, thus reducing overall process complexity while achieving pitch quadrupling
Solution Approach 2:
The staircase spacers are designed to be self-aligned and self-defining through selective etching processes. The spacers automatically form at precise locations based on the underlying mandrel geometry and etch selectivity, eliminating the need for additional alignment steps or complex process control, thereby simplifying the overall manufacturing process while achieving high resolution
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the production of semiconductor features with improved line edge roughness and line width roughness, specifically for lines and trenches below 12 nanometers, enhancing the capabilities of photolithography and extending the feature size limitations of semiconductor technologies.
Implementation Method 1
A relief pattern is formed in a photoresist layer by exposing the photoresist layer to actinic radiation
Implementation Method 2
transferred, by selective anisotropic etching, a second relief pattern into at least one of the underlying layers
Implementation Method 3
forming sidewall spacers on each line of the first layer and the second layer
Data Source
AI summary
Devices are made by self-aligned quad pitch patterning (SAQP), staircase patterning and double staircase patterning. Methods for making devices by self-aligned quad pitch patterning (SAQP) use a single spacer in the process. Methods for making devices by staircase patterning and double staircase patterning do not use a spacer. An intermediate process step called self-aligned double patterning (SADP) is used to double the pitch following the spacer deposition. A pattern is formed on a substrate, the pattern having ultra-fine resolutions by repeating the SADP step twice for pitch quadrupling and introducing a reversal layer to form a fine trench pattern and hole pattern. The pattern designs or pattern layouts have improved LER/LWR (line edge roughness and line width roughness respectively) for below 12 nm lines and trenches in order to create self-aligned cross pitch quad trenches.