Staircase Spacer SAQP Patterning for Sub-12 Nm Roughness Control
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Solution Overview
Problem
Current pitch reduction techniques for semiconductor manufacturing, such as double patterning and self-aligned spacer double patterning, face limitations in achieving ultra-fine resolutions and efficient feature sizing below 12 nm, particularly in maintaining line edge roughness and line width roughness.
Innovation Solution
The method involves repeating the self-aligned spacer double patterning step twice and introducing a reversal layer to form fine trench and hole patterns, using a stack of layers with specific etching processes to achieve a line-to-space ratio of 1:1, allowing for precise patterning and improved resolution through isotropic and anisotropic etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional pitch reduction techniques are used, then manufacturing capability is maintained, but ultra-fine resolutions below 12 nm cannot be achieved
Solution Approach 1:
The patent segments the patterning process into multiple discrete steps including forming first and second relief patterns with different line-to-space ratios, selective etching of specific layers, and staged spacer formation. This segmentation allows achieving ultra-fine resolutions by breaking down the complex pitch reduction into manageable sequential operations rather than attempting single-step patterning
Solution Approach 2:
The patent introduces vertical dimensionality by forming a stack of layers with different materials at different heights, where the first relief pattern is formed in upper layers and the second relief pattern is formed in lower layers. This multi-layer stacked approach enables independent patterning control in each layer, achieving resolutions below 12 nm that cannot be obtained with conventional single-layer techniques
2Manufacturing precision
If photolithography is used beyond traditional size limitations, then ultra-fine features can be created, but line edge roughness and line width roughness increase
Solution Approach 1:
The patent employs self-aligned spacer formation where spacers are deposited conformally on the relief patterns and then etched back, with the spacer width automatically determined by the spacer material thickness and deposition geometry. This self-aligned approach eliminates the need for separate alignment steps that would introduce additional roughness, and the spacer formation process inherently defines precise line widths and edges without requiring additional photolithography exposure
Solution Approach 2:
The patent changes the line-to-space ratio parameter from conventional 1:1 to non-standard ratios (such as 2:1 or 3:1) in intermediate patterns, allowing the final 1:1 pattern to be achieved with reduced roughness. By using different line-to-space ratios in different layers and stages, the process optimizes the final feature quality while maintaining ultra-fine dimensions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of ultra-fine features with improved line edge roughness and line width roughness, extending the capabilities of photolithography beyond traditional size limitations and enhancing the manufacturing of semiconductor devices.
Implementation Method 1
executing a first etch process, the first etch process being an isotropic etch that etches a material of the first layer without etching a material of the second layer and without etching a material of the at least one underlying layer
Implementation Method 2
transferring, by selective anisotropic etching, a second relief pattern into at least one of the underlying layers
Data Source
AI summary
Devices are made by self-aligned quad pitch patterning (SAQP) and methods for making devices by self-aligned quad pitch patterning (SAQP) use a single spacer in the process. An intermediate process step called self-aligned double patterning (SADP) is used to double the pitch following the spacer deposition. A pattern is formed on a substrate, the pattern having ultra-fine resolutions by repeating the SADP step twice for pitch quadrupling and introducing a reversal layer to form a fine trench pattern and hole pattern. An initial pattern is obtained by the X-Y double line exposures. Reverse material is applied on the initial pattern and subsequent etching process converts each initial trench pattern to a line. The pattern designs or pattern layouts have improved LER/LWR (line edge roughness and line width roughness respectively) for below 12 nm lines and trenches in order to create self-aligned cross pitch quad trenches.