3D Memory Staircase Structure for Bilateral Word Line Driving
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Solution Overview
Problem
Planar memory cell technologies face challenges in scaling and cost as feature sizes approach limits, necessitating a more efficient memory density solution.
Innovation Solution
The implementation of a 3D memory device with a staircase structure that laterally divides the memory array into two sections, using a bridge structure to connect them, allowing for a bilateral word line-driving scheme and reducing resistive-capacitive delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If planar memory cell scaling continues, then memory density increases, but manufacturing complexity and cost increase significantly
Solution Approach 1:
The patent transitions from planar 2D memory cell architecture to a 3D vertical stack architecture with multiple memory layers stacked above each other. This dimensional change allows memory density to increase vertically rather than requiring continued lateral scaling, thereby reducing fabrication complexity and cost associated with sub-lithographic feature sizes while maintaining high memory density through the stack structure with alternating memory and separator layers
2Quantity of substance
If 3D memory architecture is implemented, then memory density increases, but resistive-capacitive delay increases
Solution Approach 1:
The patent segments the memory array into multiple independent memory layers stacked vertically, with each layer accessible through separate word line and bit line connections. This segmentation allows parallel access to multiple memory layers simultaneously, reducing the overall RC delay by distributing the access burden across multiple shorter signal paths rather than one long path through a single large 3D array
3Ease of operation
If memory array is laterally divided into two sections, then bilateral word line-driving scheme is enabled, but device structure complexity increases
Solution Approach 1:
The patent uses a staircase structure that extends vertically through multiple memory layers to provide lateral division and bilateral word line access. By utilizing the vertical dimension to create staggered access points at different heights, the structure enables efficient bilateral driving without requiring complex lateral segmentation at each memory layer level, thus reducing overall structural complexity while maintaining operational efficiency
Data Source
AI summary
Embodiments of 3D memory devices having staircase structures and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory array structure and a staircase structure in an intermediate of the memory array structure and laterally dividing the memory array structure into first and second memory array structures. The staircase structure includes a first staircase zone and a bridge structure connecting the first and second memory array structures. The first staircase zone includes a first pair of staircases facing each other in a first lateral direction and at different depths. Each staircase includes a plurality of stairs. Each staircase includes divisions in a second lateral direction perpendicular to the first lateral direction at different depths. At least one stair in the first pair of staircases is electrically connected to at least one of the first and second memory array structures through the bridge structure.