Stairless 3D Memory Interconnect Using Tiered Contact Pillars
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Solution Overview
Problem
Existing 3D memory array technologies face challenges in providing efficient electrical interconnect structures to access individual tiers within a 3D array, particularly due to the complexity of staircase structures and the need for high aspect-ratio patterning, which can lead to issues like cracks and under/overetch.
Innovation Solution
A stairless electrical interconnect structure is developed, using a two-dimensional array of vertical contact pillars embedded within the material stack, formed through a multi-cycle etching process that creates trenches of varying depths to reach multiple tiers without the need for staircase patterning, thereby eliminating the risks associated with conventional staircase designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If staircase structures are used for electrical interconnects in 3D memory arrays, then access to individual tiers is enabled, but the structure complexity increases and high aspect-ratio patterning is required leading to defects
Solution Approach 1:
The patent divides the continuous staircase structure into discrete vertical contact pillars of varying heights. Each contact pillar is segmented to reach specific tiers independently, eliminating the need for complex staircase patterning while maintaining tier access capability. This segmentation approach reduces structural complexity and avoids high aspect-ratio patterning issues.
Solution Approach 2:
The patent transitions from the traditional two-dimensional staircase layout to a three-dimensional array of vertical contact pillars with varying heights. By introducing the height dimension as a variable parameter, the structure can access multiple tiers directly without requiring lateral staircase steps, thereby simplifying the overall structure while maintaining functionality.
2Ease of operation
If staircase structures are used for electrical interconnects, then tier access is achieved, but manufacturing precision is compromised due to high aspect-ratio patterning issues
Solution Approach 1:
By segmenting the interconnect structure into discrete vertical contact pillars of different heights, the patent eliminates the need for high aspect-ratio staircase patterning. Each pillar can be formed with standard aspect ratios, significantly improving manufacturing precision and reducing defects such as cracks and under/overetching while preserving tier access capability.
3Ease of manufacture
If conventional staircase patterning is used, then electrical interconnects can be formed, but the process efficiency decreases due to complex multi-step patterning
Solution Approach 1:
The patent employs preliminary patterning of hard masks at the top surface to define the footprints of vertical contact pillars before etching. This preliminary action allows subsequent etching processes to directly form the final contact pillar structures without requiring multiple iterative patterning steps, thereby improving process efficiency while maintaining ease of manufacture.
Solution Approach 2:
The patent utilizes periodic etching cycles with alternating chemistry to selectively remove materials and form vertical contact pillars of varying heights. This periodic action enables efficient formation of complex interconnect structures through repeated application of the same etching sequence, improving productivity compared to conventional single-step patterning approaches.
4Ease of operation
If staircase structures are used, then electrical interconnects can access tiers, but reliability decreases due to cracks and under/overetch defects
Solution Approach 1:
By dividing the interconnect structure into separate vertical contact pillars rather than continuous staircase structures, the patent eliminates stress concentration points that lead to cracks. Each pillar is independently supported, improving structural reliability while maintaining the ability to access individual tiers.
Solution Approach 2:
Instead of forming trenches that require filling (conventional approach), the patent inverts the process by forming vertical pillars through selective etching of sacrificial materials. This inversion eliminates underetch and overetch defects associated with trench filling, thereby improving reliability while preserving tier access functionality.
Data Source
AI summary
A stairless electrical interconnect structure with contact pillars embedded within and collectively accessing each tier in a periodic material stack, e.g., to provide electrical connections to access lines associated with a three-dimensional memory array, is described. The contact pillars can be formed in a corresponding array of vertical contact pillar trenches etched into the material stack in two stages to create depths of the trenches that vary between columns by a fixed number of tiers and then offset the depths between rows.


