Stairless 3D Memory Word Line Vias Over Support Pillars

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Solution Overview

Problem

Existing three-dimensional memory devices face challenges in forming stairless structures with efficient word line contact via configurations that support vertical NAND strings, leading to potential structural weaknesses and performance limitations.

Innovation Solution

The formation of three-dimensional memory devices involves creating a stack of insulating and conductive layers with memory openings, memory fill structures, and layer contact via assemblies, including annular insulating fins and dielectric support pillars, through a series of etching and replacement processes to establish stable word line contacts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If traditional stairless three-dimensional memory devices are formed without support features, then the device complexity is reduced, but the structural integrity and reliability deteriorate

Engineering Contradiction:
Improvedevice complexityVSAvoidstructural integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Dielectric support pillars are introduced as intermediary structures between the alternating conductive and insulating layers. These pillars provide mechanical support and maintain structural integrity during the stairless formation process, enabling reliable word line contacts without requiring traditional stair configurations. The support pillars act as mediators that resolve the contradiction between simplified device structure and maintained structural reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If word line contact via structures are formed directly without annular insulating fins, then the manufacturing process is simplified, but the contact reliability and electrical performance worsen

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidcontact reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Annular insulating fins are formed locally around the word line contact via structures at specific positions where electrical isolation is required. This local modification provides necessary electrical insulation and contact reliability without complicating the overall manufacturing process. The insulating fins are precisely positioned to ensure proper electrical performance while maintaining ease of manufacture through targeted rather than universal structural modifications.

Inventive Principle:
Principle #3Local quality

3Device complexity

If the alternating stack structure is used without support features, then the device architecture is simplified, but the mechanical stability and fabrication precision deteriorate

Engineering Contradiction:
Improvearchitecture complexityVSAvoidfabrication precision
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

Dielectric support pillars are formed preliminarily within the alternating stack structure before subsequent fabrication steps. This preliminary action provides mechanical stability and reference structures that guide subsequent processing, ensuring precise formation of word line contacts and memory openings. The support pillars are prepared in advance to maintain fabrication precision throughout the manufacturing process while keeping the overall architecture relatively simple.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250273560A1Stairless three-dimensional memory device with word line contact via structures located over support features and methods of forming the same
Publication Date: 2025.08.28 SANDISK TECHNOLOGIES LLC
  • US20250273560A1 patent drawing
  • US20250273560A1 patent drawing
  • US20250273560A1 patent drawing

AI summary

A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, a memory opening vertically extending through the alternating stack, a memory opening fill structure located in memory opening and including a vertical stack of memory elements located at levels of the electrically conductive layers and a vertical semiconductor channel, and a layer contact via structure contacting a first electrically conductive layer. The layer contact via structure overlies one or more support features.