Stairless Word Line Contact Structures in 3D Memory
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in manufacturing stairless word line contact structures, particularly in forming contact via structures without stepped surfaces in the alternating stack, which affects the integrity and performance of the memory device.
Innovation Solution
A method involving the formation of an alternating stack of insulating and sacrificial material layers, followed by the creation of memory openings, support pillar structures, and via cavities through anisotropic etch processes, replacing sacrificial materials with conductive layers, and forming tubular dielectric spacers and contact via structures within the via cavities, ensuring no stepped surfaces are formed in the stack.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to form contact via structures in three-dimensional memory devices, then the manufacturing process can be completed, but stepped surfaces are formed in the alternating stack which compromise device integrity and performance
Solution Approach 1:
The patent applies preliminary action by forming a planarized dielectric layer over the alternating stack before forming the contact via structures. This planarization step prepares the surface in advance to prevent stepped surfaces from forming during subsequent processing, thereby ensuring device integrity while enabling precise contact via structure formation.
Solution Approach 2:
The patent introduces a planarized dielectric layer as an intermediary between the alternating stack and the contact via structures. This intermediary layer absorbs the topography variations and provides a flat surface for contact via formation, resolving the contradiction between maintaining stack integrity and achieving precise contact structures.
2Ease of manufacture
If stepped surfaces are formed in the alternating stack during contact via structure formation, then the contact via structures can be formed, but the lateral isolation and contact quality are compromised
Solution Approach 1:
The planarized dielectric layer is formed in advance to provide a flat surface for contact via structure formation. This preliminary action enables easy manufacturing of contact vias while maintaining precise lateral isolation, as the planar surface prevents etch process variations that would otherwise compromise lateral isolation.
3Productivity
If the alternating stack is processed to form contact via structures, then the memory device can be manufactured, but stepped surfaces affect the uniformity and quality of the contact between layers
Solution Approach 1:
The planarized dielectric layer is formed before contact via structure formation to establish a uniform baseline surface. This preliminary action enables efficient manufacturing while ensuring uniform contact quality across all contact via structures, as the planar surface eliminates variations that would affect contact uniformity.
Solution Approach 2:
The planarized dielectric layer serves as an intermediary that decouples the alternating stack processing from the contact via formation process. This intermediary maintains contact uniformity by providing a consistent surface regardless of the underlying stack topography, thereby enabling productive manufacturing without compromising precision.
Data Source
AI summary
An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings and support openings are formed through the alternating stack, and memory opening fill structures and support pillar structures are formed in the memory openings and in the support openings, respectively. Via cavities extending to each of the sacrificial material layers are formed through the alternating stack without forming any stepped surfaces in the alternating stack. The via cavities may be formed in areas that do not overlap with the support pillar structures, or in areas that include at least one support pillar structure. Sacrificial via fill structures are formed in the via cavies, and the sacrificial material layers are replaced with electrically conductive layers. The sacrificial via fill structures are removed, and a combination of a tubular dielectric spacer and a contact via structure can be formed in the via cavities.


